drivers/clk/renesas/clk-r8a7778.c
Source file repositories/reference/linux-study-clean/drivers/clk/renesas/clk-r8a7778.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/renesas/clk-r8a7778.c- Extension
.c- Size
- 3079 bytes
- Lines
- 129
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk-provider.hlinux/clk/renesas.hlinux/of_address.hlinux/slab.hlinux/soc/renesas/rcar-rst.h
Detected Declarations
function r8a7778_cpg_register_clockfunction r8a7778_cpg_clocks_init
Annotated Snippet
if (!strcmp(name, r8a7778_divs[i].name)) {
return clk_register_fixed_factor(NULL,
r8a7778_divs[i].name,
"plla", 0, 1,
r8a7778_divs[i].div[cpg_mode_divs]);
}
}
}
return ERR_PTR(-EINVAL);
}
static void __init r8a7778_cpg_clocks_init(struct device_node *np)
{
struct clk_onecell_data *data;
struct clk **clks;
unsigned int i;
int num_clks;
u32 mode;
if (rcar_rst_read_mode_pins(&mode))
return;
BUG_ON(!(mode & BIT(19)));
cpg_mode_rates = (!!(mode & BIT(18)) << 2) |
(!!(mode & BIT(12)) << 1) |
(!!(mode & BIT(11)));
cpg_mode_divs = (!!(mode & BIT(2)) << 1) |
(!!(mode & BIT(1)));
num_clks = of_property_count_strings(np, "clock-output-names");
if (num_clks < 0) {
pr_err("%s: failed to count clocks\n", __func__);
return;
}
data = kzalloc_obj(*data);
clks = kzalloc_objs(*clks, num_clks);
if (data == NULL || clks == NULL) {
/* We're leaking memory on purpose, there's no point in cleaning
* up as the system won't boot anyway.
*/
return;
}
data->clks = clks;
data->clk_num = num_clks;
for (i = 0; i < num_clks; ++i) {
const char *name;
struct clk *clk;
of_property_read_string_index(np, "clock-output-names", i,
&name);
clk = r8a7778_cpg_register_clock(np, name);
if (IS_ERR(clk))
pr_err("%s: failed to register %pOFn %s clock (%ld)\n",
__func__, np, name, PTR_ERR(clk));
else
data->clks[i] = clk;
}
of_clk_add_provider(np, of_clk_src_onecell_get, data);
cpg_mstp_add_clk_domain(np);
}
CLK_OF_DECLARE(r8a7778_cpg_clks, "renesas,r8a7778-cpg-clocks",
r8a7778_cpg_clocks_init);
Annotation
- Immediate include surface: `linux/clk-provider.h`, `linux/clk/renesas.h`, `linux/of_address.h`, `linux/slab.h`, `linux/soc/renesas/rcar-rst.h`.
- Detected declarations: `function r8a7778_cpg_register_clock`, `function r8a7778_cpg_clocks_init`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.