drivers/clk/renesas/r9a06g032-clocks.c

File Facts

System

Linux kernel

Corpus path

drivers/clk/renesas/r9a06g032-clocks.c

Extension

.c

Size

47998 bytes

Lines

1429

Domain

Driver Families

Bucket

drivers/clk

Inferred role

Driver Families: exported/initcall integration point

Status

integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Allocates kernel memory; connect allocation flags and lifetime to context constraints.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/clk.h
• linux/clk-provider.h
• linux/delay.h
• linux/init.h
• linux/io.h
• linux/kernel.h
• linux/math64.h
• linux/of.h
• linux/of_address.h
• linux/of_platform.h
• linux/platform_device.h
• linux/pm_clock.h
• linux/pm_domain.h
• linux/reboot.h
• linux/slab.h
• linux/soc/renesas/r9a06g032-sysctrl.h
• linux/spinlock.h
• dt-bindings/clock/r9a06g032-sysctrl.h

Detected Declarations

• struct regbit
• struct r9a06g032_gate
• struct r9a06g032_clkdesc
• struct r9a06g032_priv
• struct r9a06g032_clk_gate
• struct r9a06g032_clk_div
• struct r9a06g032_clk_bitsel
• struct r9a06g032_clk_dualgate
• enum gate_type
• function r9a06g032_sysctrl_set_dmamux
• function clk_rdesc_set
• function clk_rdesc_get
• function create_add_module_clock
• function r9a06g032_attach_dev
• function r9a06g032_detach_dev
• function r9a06g032_add_clk_domain
• function r9a06g032_clk_gate_set
• function r9a06g032_clk_gate_enable
• function r9a06g032_clk_gate_disable
• function r9a06g032_clk_gate_is_enabled
• function r9a06g032_register_gate
• function container_of
• function r9a06g032_div_clamp_div
• function r9a06g032_div_determine_rate
• function r9a06g032_div_set_rate
• function r9a06g032_register_div
• function container_of
• function r9a06g032_clk_mux_set_parent
• function r9a06g032_register_bitsel
• function container_of
• function r9a06g032_clk_dualgate_enable
• function r9a06g032_clk_dualgate_disable
• function r9a06g032_clk_dualgate_is_enabled
• function r9a06g032_register_dualgate
• function r9a06g032_clocks_del_clk_provider
• function r9a06g032_restart_handler
• function r9a06g032_init_h2mode
• function for_each_compatible_node
• function r9a06g032_clocks_probe
• function r9a06g032_clocks_init
• module init r9a06g032_clocks_init
• export r9a06g032_sysctrl_set_dmamux

Annotated Snippet

subsys_initcall(r9a06g032_clocks_init);

Annotation

• Immediate include surface: `linux/clk.h`, `linux/clk-provider.h`, `linux/delay.h`, `linux/init.h`, `linux/io.h`, `linux/kernel.h`, `linux/math64.h`, `linux/of.h`.
• Detected declarations: `struct regbit`, `struct r9a06g032_gate`, `struct r9a06g032_clkdesc`, `struct r9a06g032_priv`, `struct r9a06g032_clk_gate`, `struct r9a06g032_clk_div`, `struct r9a06g032_clk_bitsel`, `struct r9a06g032_clk_dualgate`, `enum gate_type`, `function r9a06g032_sysctrl_set_dmamux`.
• Atlas domain: Driver Families / drivers/clk.
• Implementation status: integration implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.