drivers/clk/renesas/rcar-usb2-clock-sel.c

Source file repositories/reference/linux-study-clean/drivers/clk/renesas/rcar-usb2-clock-sel.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/renesas/rcar-usb2-clock-sel.c
Extension
.c
Size
5411 bytes
Lines
221
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct usb2_clock_sel_priv {
	void __iomem *base;
	struct clk_hw hw;
	struct clk_bulk_data clks[ARRAY_SIZE(rcar_usb2_clocks)];
	struct reset_control *rsts;
	bool extal;
	bool xtal;
};
#define to_priv(_hw)	container_of(_hw, struct usb2_clock_sel_priv, hw)

static void usb2_clock_sel_enable_extal_only(struct usb2_clock_sel_priv *priv)
{
	u16 val = readw(priv->base + USB20_CLKSET0);

	pr_debug("%s: enter %d %d %x\n", __func__,
		 priv->extal, priv->xtal, val);

	if (priv->extal && !priv->xtal && val != CLKSET0_EXTAL_ONLY)
		writew(CLKSET0_EXTAL_ONLY, priv->base + USB20_CLKSET0);
}

static void usb2_clock_sel_disable_extal_only(struct usb2_clock_sel_priv *priv)
{
	if (priv->extal && !priv->xtal)
		writew(CLKSET0_PRIVATE, priv->base + USB20_CLKSET0);
}

static int usb2_clock_sel_enable(struct clk_hw *hw)
{
	struct usb2_clock_sel_priv *priv = to_priv(hw);
	int ret;

	ret = reset_control_deassert(priv->rsts);
	if (ret)
		return ret;

	ret = clk_bulk_prepare_enable(ARRAY_SIZE(priv->clks), priv->clks);
	if (ret) {
		reset_control_assert(priv->rsts);
		return ret;
	}

	usb2_clock_sel_enable_extal_only(priv);

	return 0;
}

static void usb2_clock_sel_disable(struct clk_hw *hw)
{
	struct usb2_clock_sel_priv *priv = to_priv(hw);

	usb2_clock_sel_disable_extal_only(priv);

	clk_bulk_disable_unprepare(ARRAY_SIZE(priv->clks), priv->clks);
	reset_control_assert(priv->rsts);
}

/*
 * This module seems a mux, but this driver assumes a gate because
 * ehci/ohci platform drivers don't support clk_set_parent() for now.
 * If this driver acts as a gate, ehci/ohci-platform drivers don't need
 * any modification.
 */
static const struct clk_ops usb2_clock_sel_clock_ops = {
	.enable = usb2_clock_sel_enable,
	.disable = usb2_clock_sel_disable,
};

static const struct of_device_id rcar_usb2_clock_sel_match[] = {
	{ .compatible = "renesas,rcar-gen3-usb2-clock-sel" },
	{ }
};

static int rcar_usb2_clock_sel_suspend(struct device *dev)
{
	struct usb2_clock_sel_priv *priv = dev_get_drvdata(dev);

	usb2_clock_sel_disable_extal_only(priv);
	pm_runtime_put(dev);

	return 0;
}

static int rcar_usb2_clock_sel_resume(struct device *dev)
{
	struct usb2_clock_sel_priv *priv = dev_get_drvdata(dev);

	pm_runtime_get_sync(dev);
	usb2_clock_sel_enable_extal_only(priv);

Annotation

Implementation Notes