drivers/clk/rockchip/rst-rk3506.c

Source file repositories/reference/linux-study-clean/drivers/clk/rockchip/rst-rk3506.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/rockchip/rst-rk3506.c
Extension
.c
Size
9054 bytes
Lines
227
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2025 Rockchip Electronics Co., Ltd.
 * Author: Finley Xiao <finley.xiao@rock-chips.com>
 */

#include <linux/module.h>
#include <linux/of.h>
#include <dt-bindings/reset/rockchip,rk3506-cru.h>
#include "clk.h"

/* 0xFF9A0000 + 0x0A00 */
#define RK3506_CRU_RESET_OFFSET(id, reg, bit) [id] = (0 + reg * 16 + bit)

/* mapping table for reset ID to register offset */
static const int rk3506_register_offset[] = {
	/* CRU-->SOFTRST_CON00 */
	RK3506_CRU_RESET_OFFSET(SRST_NCOREPORESET0_AC, 0, 0),
	RK3506_CRU_RESET_OFFSET(SRST_NCOREPORESET1_AC, 0, 1),
	RK3506_CRU_RESET_OFFSET(SRST_NCOREPORESET2_AC, 0, 2),
	RK3506_CRU_RESET_OFFSET(SRST_NCORESET0_AC, 0, 4),
	RK3506_CRU_RESET_OFFSET(SRST_NCORESET1_AC, 0, 5),
	RK3506_CRU_RESET_OFFSET(SRST_NCORESET2_AC, 0, 6),
	RK3506_CRU_RESET_OFFSET(SRST_NL2RESET_AC, 0, 8),
	RK3506_CRU_RESET_OFFSET(SRST_A_CORE_BIU_AC, 0, 9),
	RK3506_CRU_RESET_OFFSET(SRST_H_M0_AC, 0, 10),

	/* CRU-->SOFTRST_CON02 */
	RK3506_CRU_RESET_OFFSET(SRST_NDBGRESET, 2, 10),
	RK3506_CRU_RESET_OFFSET(SRST_P_CORE_BIU, 2, 14),
	RK3506_CRU_RESET_OFFSET(SRST_PMU, 2, 15),

	/* CRU-->SOFTRST_CON03 */
	RK3506_CRU_RESET_OFFSET(SRST_P_DBG, 3, 1),
	RK3506_CRU_RESET_OFFSET(SRST_POT_DBG, 3, 2),
	RK3506_CRU_RESET_OFFSET(SRST_P_CORE_GRF, 3, 4),
	RK3506_CRU_RESET_OFFSET(SRST_CORE_EMA_DETECT, 3, 6),
	RK3506_CRU_RESET_OFFSET(SRST_REF_PVTPLL_CORE, 3, 7),
	RK3506_CRU_RESET_OFFSET(SRST_P_GPIO1, 3, 8),
	RK3506_CRU_RESET_OFFSET(SRST_DB_GPIO1, 3, 9),

	/* CRU-->SOFTRST_CON04 */
	RK3506_CRU_RESET_OFFSET(SRST_A_CORE_PERI_BIU, 4, 3),
	RK3506_CRU_RESET_OFFSET(SRST_A_DSMC, 4, 5),
	RK3506_CRU_RESET_OFFSET(SRST_P_DSMC, 4, 6),
	RK3506_CRU_RESET_OFFSET(SRST_FLEXBUS, 4, 7),
	RK3506_CRU_RESET_OFFSET(SRST_A_FLEXBUS, 4, 9),
	RK3506_CRU_RESET_OFFSET(SRST_H_FLEXBUS, 4, 10),
	RK3506_CRU_RESET_OFFSET(SRST_A_DSMC_SLV, 4, 11),
	RK3506_CRU_RESET_OFFSET(SRST_H_DSMC_SLV, 4, 12),
	RK3506_CRU_RESET_OFFSET(SRST_DSMC_SLV, 4, 13),

	/* CRU-->SOFTRST_CON05 */
	RK3506_CRU_RESET_OFFSET(SRST_A_BUS_BIU, 5, 3),
	RK3506_CRU_RESET_OFFSET(SRST_H_BUS_BIU, 5, 4),
	RK3506_CRU_RESET_OFFSET(SRST_P_BUS_BIU, 5, 5),
	RK3506_CRU_RESET_OFFSET(SRST_A_SYSRAM, 5, 6),
	RK3506_CRU_RESET_OFFSET(SRST_H_SYSRAM, 5, 7),
	RK3506_CRU_RESET_OFFSET(SRST_A_DMAC0, 5, 8),
	RK3506_CRU_RESET_OFFSET(SRST_A_DMAC1, 5, 9),
	RK3506_CRU_RESET_OFFSET(SRST_H_M0, 5, 10),
	RK3506_CRU_RESET_OFFSET(SRST_M0_JTAG, 5, 11),
	RK3506_CRU_RESET_OFFSET(SRST_H_CRYPTO, 5, 15),

	/* CRU-->SOFTRST_CON06 */
	RK3506_CRU_RESET_OFFSET(SRST_H_RNG, 6, 0),
	RK3506_CRU_RESET_OFFSET(SRST_P_BUS_GRF, 6, 1),
	RK3506_CRU_RESET_OFFSET(SRST_P_TIMER0, 6, 2),
	RK3506_CRU_RESET_OFFSET(SRST_TIMER0_CH0, 6, 3),
	RK3506_CRU_RESET_OFFSET(SRST_TIMER0_CH1, 6, 4),
	RK3506_CRU_RESET_OFFSET(SRST_TIMER0_CH2, 6, 5),
	RK3506_CRU_RESET_OFFSET(SRST_TIMER0_CH3, 6, 6),
	RK3506_CRU_RESET_OFFSET(SRST_TIMER0_CH4, 6, 7),
	RK3506_CRU_RESET_OFFSET(SRST_TIMER0_CH5, 6, 8),
	RK3506_CRU_RESET_OFFSET(SRST_P_WDT0, 6, 9),
	RK3506_CRU_RESET_OFFSET(SRST_T_WDT0, 6, 10),
	RK3506_CRU_RESET_OFFSET(SRST_P_WDT1, 6, 11),
	RK3506_CRU_RESET_OFFSET(SRST_T_WDT1, 6, 12),
	RK3506_CRU_RESET_OFFSET(SRST_P_MAILBOX, 6, 13),
	RK3506_CRU_RESET_OFFSET(SRST_P_INTMUX, 6, 14),
	RK3506_CRU_RESET_OFFSET(SRST_P_SPINLOCK, 6, 15),

	/* CRU-->SOFTRST_CON07 */
	RK3506_CRU_RESET_OFFSET(SRST_P_DDRC, 7, 0),
	RK3506_CRU_RESET_OFFSET(SRST_H_DDRPHY, 7, 1),
	RK3506_CRU_RESET_OFFSET(SRST_P_DDRMON, 7, 2),
	RK3506_CRU_RESET_OFFSET(SRST_DDRMON_OSC, 7, 3),
	RK3506_CRU_RESET_OFFSET(SRST_P_DDR_LPC, 7, 4),
	RK3506_CRU_RESET_OFFSET(SRST_H_USBOTG0, 7, 5),
	RK3506_CRU_RESET_OFFSET(SRST_USBOTG0_ADP, 7, 7),

Annotation

Implementation Notes