drivers/clk/rockchip/rst-rk3528.c

Source file repositories/reference/linux-study-clean/drivers/clk/rockchip/rst-rk3528.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/rockchip/rst-rk3528.c
Extension
.c
Size
12436 bytes
Lines
307
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
 * Based on Sebastian Reichel's implementation for RK3588
 */

#include <linux/module.h>
#include <linux/of.h>
#include <dt-bindings/reset/rockchip,rk3528-cru.h>
#include "clk.h"

/* 0xFF4A0000 + 0x0A00 */
#define RK3528_CRU_RESET_OFFSET(id, reg, bit) [id] = (0 + reg * 16 + bit)

/* mapping table for reset ID to register offset */
static const int rk3528_register_offset[] = {
	/* CRU_SOFTRST_CON03 */
	RK3528_CRU_RESET_OFFSET(SRST_CORE0_PO, 3, 0),
	RK3528_CRU_RESET_OFFSET(SRST_CORE1_PO, 3, 1),
	RK3528_CRU_RESET_OFFSET(SRST_CORE2_PO, 3, 2),
	RK3528_CRU_RESET_OFFSET(SRST_CORE3_PO, 3, 3),
	RK3528_CRU_RESET_OFFSET(SRST_CORE0, 3, 4),
	RK3528_CRU_RESET_OFFSET(SRST_CORE1, 3, 5),
	RK3528_CRU_RESET_OFFSET(SRST_CORE2, 3, 6),
	RK3528_CRU_RESET_OFFSET(SRST_CORE3, 3, 7),
	RK3528_CRU_RESET_OFFSET(SRST_NL2, 3, 8),
	RK3528_CRU_RESET_OFFSET(SRST_CORE_BIU, 3, 9),
	RK3528_CRU_RESET_OFFSET(SRST_CORE_CRYPTO, 3, 10),

	/* CRU_SOFTRST_CON05 */
	RK3528_CRU_RESET_OFFSET(SRST_P_DBG, 5, 13),
	RK3528_CRU_RESET_OFFSET(SRST_POT_DBG, 5, 14),
	RK3528_CRU_RESET_OFFSET(SRST_NT_DBG, 5, 15),

	/* CRU_SOFTRST_CON06 */
	RK3528_CRU_RESET_OFFSET(SRST_P_CORE_GRF, 6, 2),
	RK3528_CRU_RESET_OFFSET(SRST_P_DAPLITE_BIU, 6, 3),
	RK3528_CRU_RESET_OFFSET(SRST_P_CPU_BIU, 6, 4),
	RK3528_CRU_RESET_OFFSET(SRST_REF_PVTPLL_CORE, 6, 7),

	/* CRU_SOFTRST_CON08 */
	RK3528_CRU_RESET_OFFSET(SRST_A_BUS_VOPGL_BIU, 8, 1),
	RK3528_CRU_RESET_OFFSET(SRST_A_BUS_H_BIU, 8, 3),
	RK3528_CRU_RESET_OFFSET(SRST_A_SYSMEM_BIU, 8, 8),
	RK3528_CRU_RESET_OFFSET(SRST_A_BUS_BIU, 8, 10),
	RK3528_CRU_RESET_OFFSET(SRST_H_BUS_BIU, 8, 11),
	RK3528_CRU_RESET_OFFSET(SRST_P_BUS_BIU, 8, 12),
	RK3528_CRU_RESET_OFFSET(SRST_P_DFT2APB, 8, 13),
	RK3528_CRU_RESET_OFFSET(SRST_P_BUS_GRF, 8, 15),

	/* CRU_SOFTRST_CON09 */
	RK3528_CRU_RESET_OFFSET(SRST_A_BUS_M_BIU, 9, 0),
	RK3528_CRU_RESET_OFFSET(SRST_A_GIC, 9, 1),
	RK3528_CRU_RESET_OFFSET(SRST_A_SPINLOCK, 9, 2),
	RK3528_CRU_RESET_OFFSET(SRST_A_DMAC, 9, 4),
	RK3528_CRU_RESET_OFFSET(SRST_P_TIMER, 9, 5),
	RK3528_CRU_RESET_OFFSET(SRST_TIMER0, 9, 6),
	RK3528_CRU_RESET_OFFSET(SRST_TIMER1, 9, 7),
	RK3528_CRU_RESET_OFFSET(SRST_TIMER2, 9, 8),
	RK3528_CRU_RESET_OFFSET(SRST_TIMER3, 9, 9),
	RK3528_CRU_RESET_OFFSET(SRST_TIMER4, 9, 10),
	RK3528_CRU_RESET_OFFSET(SRST_TIMER5, 9, 11),
	RK3528_CRU_RESET_OFFSET(SRST_P_JDBCK_DAP, 9, 12),
	RK3528_CRU_RESET_OFFSET(SRST_JDBCK_DAP, 9, 13),
	RK3528_CRU_RESET_OFFSET(SRST_P_WDT_NS, 9, 15),

	/* CRU_SOFTRST_CON10 */
	RK3528_CRU_RESET_OFFSET(SRST_T_WDT_NS, 10, 0),
	RK3528_CRU_RESET_OFFSET(SRST_H_TRNG_NS, 10, 3),
	RK3528_CRU_RESET_OFFSET(SRST_P_UART0, 10, 7),
	RK3528_CRU_RESET_OFFSET(SRST_S_UART0, 10, 8),
	RK3528_CRU_RESET_OFFSET(SRST_PKA_CRYPTO, 10, 10),
	RK3528_CRU_RESET_OFFSET(SRST_A_CRYPTO, 10, 11),
	RK3528_CRU_RESET_OFFSET(SRST_H_CRYPTO, 10, 12),
	RK3528_CRU_RESET_OFFSET(SRST_P_DMA2DDR, 10, 13),
	RK3528_CRU_RESET_OFFSET(SRST_A_DMA2DDR, 10, 14),

	/* CRU_SOFTRST_CON11 */
	RK3528_CRU_RESET_OFFSET(SRST_P_PWM0, 11, 4),
	RK3528_CRU_RESET_OFFSET(SRST_PWM0, 11, 5),
	RK3528_CRU_RESET_OFFSET(SRST_P_PWM1, 11, 7),
	RK3528_CRU_RESET_OFFSET(SRST_PWM1, 11, 8),
	RK3528_CRU_RESET_OFFSET(SRST_P_SCR, 11, 10),
	RK3528_CRU_RESET_OFFSET(SRST_A_DCF, 11, 11),
	RK3528_CRU_RESET_OFFSET(SRST_P_INTMUX, 11, 12),

	/* CRU_SOFTRST_CON25 */
	RK3528_CRU_RESET_OFFSET(SRST_A_VPU_BIU, 25, 6),
	RK3528_CRU_RESET_OFFSET(SRST_H_VPU_BIU, 25, 7),
	RK3528_CRU_RESET_OFFSET(SRST_P_VPU_BIU, 25, 8),

Annotation

Implementation Notes