drivers/clk/rockchip/rst-rk3576.c

Source file repositories/reference/linux-study-clean/drivers/clk/rockchip/rst-rk3576.c

File Facts

System: Linux kernel
Corpus path: drivers/clk/rockchip/rst-rk3576.c
Extension: .c
Size: 26934 bytes
Lines: 652
Domain: Driver Families
Bucket: drivers/clk
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

linux/module.h
linux/of.h
dt-bindings/reset/rockchip,rk3576-cru.h
clk.h

Detected Declarations

function rk3576_rst_init

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
 * Copyright (c) 2024 Collabora Ltd.
 * Author: Detlev Casanova <detlev.casanova@collabora.com>
 * Based on Sebastien Reichel's implementation for RK3588
 */

#include <linux/module.h>
#include <linux/of.h>
#include <dt-bindings/reset/rockchip,rk3576-cru.h>
#include "clk.h"

/* 0x27200000 + 0x0A00 */
#define RK3576_CRU_RESET_OFFSET(id, reg, bit) [id] = (0 + reg * 16 + bit)
/* 0x27208000 + 0x0A00 */
#define RK3576_PHPCRU_RESET_OFFSET(id, reg, bit) [id] = (0x8000*4 + reg * 16 + bit)
/* 0x27210000 + 0x0A00 */
#define RK3576_SECURENSCRU_RESET_OFFSET(id, reg, bit) [id] = (0x10000*4 + reg * 16 + bit)
/* 0x27220000 + 0x0A00 */
#define RK3576_PMU1CRU_RESET_OFFSET(id, reg, bit) [id] = (0x20000*4 + reg * 16 + bit)

/* mapping table for reset ID to register offset */
static const int rk3576_register_offset[] = {
	/* SOFTRST_CON01 */
	RK3576_CRU_RESET_OFFSET(SRST_A_TOP_BIU, 1, 3),
	RK3576_CRU_RESET_OFFSET(SRST_P_TOP_BIU, 1, 5),
	RK3576_CRU_RESET_OFFSET(SRST_A_TOP_MID_BIU, 1, 6),
	RK3576_CRU_RESET_OFFSET(SRST_A_SECURE_HIGH_BIU, 1, 7),
	RK3576_CRU_RESET_OFFSET(SRST_H_TOP_BIU, 1, 14),

	/* SOFTRST_CON02 */
	RK3576_CRU_RESET_OFFSET(SRST_H_VO0VOP_CHANNEL_BIU, 2, 0),
	RK3576_CRU_RESET_OFFSET(SRST_A_VO0VOP_CHANNEL_BIU, 2, 1),

	/* SOFTRST_CON06 */
	RK3576_CRU_RESET_OFFSET(SRST_BISRINTF, 6, 2),

	/* SOFTRST_CON07 */
	RK3576_CRU_RESET_OFFSET(SRST_H_AUDIO_BIU, 7, 2),
	RK3576_CRU_RESET_OFFSET(SRST_H_ASRC_2CH_0, 7, 3),
	RK3576_CRU_RESET_OFFSET(SRST_H_ASRC_2CH_1, 7, 4),
	RK3576_CRU_RESET_OFFSET(SRST_H_ASRC_4CH_0, 7, 5),
	RK3576_CRU_RESET_OFFSET(SRST_H_ASRC_4CH_1, 7, 6),
	RK3576_CRU_RESET_OFFSET(SRST_ASRC_2CH_0, 7, 7),
	RK3576_CRU_RESET_OFFSET(SRST_ASRC_2CH_1, 7, 8),
	RK3576_CRU_RESET_OFFSET(SRST_ASRC_4CH_0, 7, 9),
	RK3576_CRU_RESET_OFFSET(SRST_ASRC_4CH_1, 7, 10),
	RK3576_CRU_RESET_OFFSET(SRST_M_SAI0_8CH, 7, 12),
	RK3576_CRU_RESET_OFFSET(SRST_H_SAI0_8CH, 7, 13),
	RK3576_CRU_RESET_OFFSET(SRST_H_SPDIF_RX0, 7, 14),
	RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_RX0, 7, 15),

	/* SOFTRST_CON08 */
	RK3576_CRU_RESET_OFFSET(SRST_H_SPDIF_RX1, 8, 0),
	RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_RX1, 8, 1),
	RK3576_CRU_RESET_OFFSET(SRST_M_SAI1_8CH, 8, 5),
	RK3576_CRU_RESET_OFFSET(SRST_H_SAI1_8CH, 8, 6),
	RK3576_CRU_RESET_OFFSET(SRST_M_SAI2_2CH, 8, 8),
	RK3576_CRU_RESET_OFFSET(SRST_H_SAI2_2CH, 8, 10),
	RK3576_CRU_RESET_OFFSET(SRST_M_SAI3_2CH, 8, 12),
	RK3576_CRU_RESET_OFFSET(SRST_H_SAI3_2CH, 8, 14),

	/* SOFTRST_CON09 */
	RK3576_CRU_RESET_OFFSET(SRST_M_SAI4_2CH, 9, 0),
	RK3576_CRU_RESET_OFFSET(SRST_H_SAI4_2CH, 9, 2),
	RK3576_CRU_RESET_OFFSET(SRST_H_ACDCDIG_DSM, 9, 3),
	RK3576_CRU_RESET_OFFSET(SRST_M_ACDCDIG_DSM, 9, 4),
	RK3576_CRU_RESET_OFFSET(SRST_PDM1, 9, 5),
	RK3576_CRU_RESET_OFFSET(SRST_H_PDM1, 9, 7),
	RK3576_CRU_RESET_OFFSET(SRST_M_PDM1, 9, 8),
	RK3576_CRU_RESET_OFFSET(SRST_H_SPDIF_TX0, 9, 9),
	RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_TX0, 9, 10),
	RK3576_CRU_RESET_OFFSET(SRST_H_SPDIF_TX1, 9, 11),
	RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_TX1, 9, 12),

	/* SOFTRST_CON11 */
	RK3576_CRU_RESET_OFFSET(SRST_A_BUS_BIU, 11, 3),
	RK3576_CRU_RESET_OFFSET(SRST_P_BUS_BIU, 11, 4),
	RK3576_CRU_RESET_OFFSET(SRST_P_CRU, 11, 5),
	RK3576_CRU_RESET_OFFSET(SRST_H_CAN0, 11, 6),
	RK3576_CRU_RESET_OFFSET(SRST_CAN0, 11, 7),
	RK3576_CRU_RESET_OFFSET(SRST_H_CAN1, 11, 8),
	RK3576_CRU_RESET_OFFSET(SRST_CAN1, 11, 9),
	RK3576_CRU_RESET_OFFSET(SRST_P_INTMUX2BUS, 11, 12),
	RK3576_CRU_RESET_OFFSET(SRST_P_VCCIO_IOC, 11, 13),
	RK3576_CRU_RESET_OFFSET(SRST_H_BUS_BIU, 11, 14),
	RK3576_CRU_RESET_OFFSET(SRST_KEY_SHIFT, 11, 15),

	/* SOFTRST_CON12 */

Annotation

Immediate include surface: `linux/module.h`, `linux/of.h`, `dt-bindings/reset/rockchip,rk3576-cru.h`, `clk.h`.
Detected declarations: `function rk3576_rst_init`.
Atlas domain: Driver Families / drivers/clk.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.