drivers/clk/socfpga/stratix10-clk.h

Source file repositories/reference/linux-study-clean/drivers/clk/socfpga/stratix10-clk.h

File Facts

System
Linux kernel
Corpus path
drivers/clk/socfpga/stratix10-clk.h
Extension
.h
Size
3444 bytes
Lines
136
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct stratix10_clock_data {
	void __iomem		*base;

	/* Must be last */
	struct clk_hw_onecell_data	clk_data;
};

struct stratix10_pll_clock {
	unsigned int		id;
	const char		*name;
	const struct clk_parent_data	*parent_data;
	u8			num_parents;
	unsigned long		flags;
	unsigned long		offset;
};

struct stratix10_perip_c_clock {
	unsigned int		id;
	const char		*name;
	const char		*parent_name;
	const struct clk_parent_data	*parent_data;
	u8			num_parents;
	unsigned long		flags;
	unsigned long		offset;
};

struct n5x_perip_c_clock {
	unsigned int		id;
	const char		*name;
	const char		*parent_name;
	const char		*const *parent_names;
	u8			num_parents;
	unsigned long		flags;
	unsigned long		offset;
	unsigned long		shift;
};

struct stratix10_perip_cnt_clock {
	unsigned int		id;
	const char		*name;
	const char		*parent_name;
	const struct clk_parent_data	*parent_data;
	u8			num_parents;
	unsigned long		flags;
	unsigned long		offset;
	u8			fixed_divider;
	unsigned long		bypass_reg;
	unsigned long		bypass_shift;
};

struct stratix10_gate_clock {
	unsigned int		id;
	const char		*name;
	const char		*parent_name;
	const struct clk_parent_data	*parent_data;
	u8			num_parents;
	unsigned long		flags;
	unsigned long		gate_reg;
	u8			gate_idx;
	unsigned long		div_reg;
	u8			div_offset;
	u8			div_width;
	unsigned long		bypass_reg;
	u8			bypass_shift;
	u8			fixed_div;
};

struct agilex5_pll_clock {
	unsigned int	id;
	const char	*name;
	const char	* const *parent_names;
	u8	num_parents;
	unsigned long   flags;
	unsigned long   offset;
};

struct agilex5_perip_cnt_clock {
	unsigned int		id;
	const char		*name;
	const char	* const *parent_names;
	u8			num_parents;
	unsigned long		flags;
	unsigned long		offset;
	u8			fixed_divider;
	unsigned long		bypass_reg;
	unsigned long		bypass_shift;
};

struct agilex5_gate_clock {
	unsigned int		id;

Annotation

Implementation Notes