drivers/clk/sophgo/clk-cv18xx-common.h
Source file repositories/reference/linux-study-clean/drivers/clk/sophgo/clk-cv18xx-common.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/sophgo/clk-cv18xx-common.h- Extension
.h- Size
- 2037 bytes
- Lines
- 82
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/compiler.hlinux/clk-provider.hlinux/bitfield.h
Detected Declarations
struct cv1800_clk_commonstruct cv1800_clk_regbitstruct cv1800_clk_regfieldfunction hw_to_cv1800_clk_common
Annotated Snippet
struct cv1800_clk_common {
void __iomem *base;
spinlock_t *lock;
struct clk_hw hw;
unsigned long features;
};
#define CV1800_CLK_COMMON(_name, _parents, _op, _flags) \
{ \
.hw.init = CLK_HW_INIT_PARENTS_DATA(_name, _parents, \
_op, _flags), \
}
static inline struct cv1800_clk_common *
hw_to_cv1800_clk_common(struct clk_hw *hw)
{
return container_of(hw, struct cv1800_clk_common, hw);
}
struct cv1800_clk_regbit {
u16 reg;
s8 shift;
};
struct cv1800_clk_regfield {
u16 reg;
u8 shift;
u8 width;
s16 initval;
unsigned long flags;
};
#define CV1800_CLK_BIT(_reg, _shift) \
{ \
.reg = _reg, \
.shift = _shift, \
}
#define CV1800_CLK_REG(_reg, _shift, _width, _initval, _flags) \
{ \
.reg = _reg, \
.shift = _shift, \
.width = _width, \
.initval = _initval, \
.flags = _flags, \
}
#define cv1800_clk_regfield_genmask(_reg) \
GENMASK((_reg)->shift + (_reg)->width - 1, (_reg)->shift)
#define cv1800_clk_regfield_get(_val, _reg) \
(((_val) >> (_reg)->shift) & GENMASK((_reg)->width - 1, 0))
#define cv1800_clk_regfield_set(_val, _new, _reg) \
(((_val) & ~cv1800_clk_regfield_genmask((_reg))) | \
(((_new) & GENMASK((_reg)->width - 1, 0)) << (_reg)->shift))
#define _CV1800_SET_FIELD(_reg, _val, _field) \
(((_reg) & ~(_field)) | FIELD_PREP((_field), (_val)))
int cv1800_clk_setbit(struct cv1800_clk_common *common,
struct cv1800_clk_regbit *field);
int cv1800_clk_clearbit(struct cv1800_clk_common *common,
struct cv1800_clk_regbit *field);
int cv1800_clk_checkbit(struct cv1800_clk_common *common,
struct cv1800_clk_regbit *field);
void cv1800_clk_wait_for_lock(struct cv1800_clk_common *common,
u32 reg, u32 lock);
#endif // _CLK_SOPHGO_CV18XX_IP_H_
Annotation
- Immediate include surface: `linux/compiler.h`, `linux/clk-provider.h`, `linux/bitfield.h`.
- Detected declarations: `struct cv1800_clk_common`, `struct cv1800_clk_regbit`, `struct cv1800_clk_regfield`, `function hw_to_cv1800_clk_common`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.