drivers/clk/spear/clk.h
Source file repositories/reference/linux-study-clean/drivers/clk/spear/clk.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/spear/clk.h- Extension
.h- Size
- 2992 bytes
- Lines
- 132
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk-provider.hlinux/spinlock_types.hlinux/types.h
Detected Declarations
struct aux_clk_masksstruct aux_rate_tblstruct clk_auxstruct frac_rate_tblstruct clk_fracstruct gpt_rate_tblstruct clk_gptstruct pll_rate_tblstruct clk_vcostruct clk_pll
Annotated Snippet
struct aux_clk_masks {
u32 eq_sel_mask;
u32 eq_sel_shift;
u32 eq1_mask;
u32 eq2_mask;
u32 xscale_sel_mask;
u32 xscale_sel_shift;
u32 yscale_sel_mask;
u32 yscale_sel_shift;
u32 enable_bit;
};
struct aux_rate_tbl {
u16 xscale;
u16 yscale;
u8 eq;
};
struct clk_aux {
struct clk_hw hw;
void __iomem *reg;
const struct aux_clk_masks *masks;
struct aux_rate_tbl *rtbl;
u8 rtbl_cnt;
spinlock_t *lock;
};
/* Fractional Synth clk */
struct frac_rate_tbl {
u32 div;
};
struct clk_frac {
struct clk_hw hw;
void __iomem *reg;
struct frac_rate_tbl *rtbl;
u8 rtbl_cnt;
spinlock_t *lock;
};
/* GPT clk */
struct gpt_rate_tbl {
u16 mscale;
u16 nscale;
};
struct clk_gpt {
struct clk_hw hw;
void __iomem *reg;
struct gpt_rate_tbl *rtbl;
u8 rtbl_cnt;
spinlock_t *lock;
};
/* VCO-PLL clk */
struct pll_rate_tbl {
u8 mode;
u16 m;
u8 n;
u8 p;
};
struct clk_vco {
struct clk_hw hw;
void __iomem *mode_reg;
void __iomem *cfg_reg;
struct pll_rate_tbl *rtbl;
u8 rtbl_cnt;
spinlock_t *lock;
};
struct clk_pll {
struct clk_hw hw;
struct clk_vco *vco;
const char *parent[1];
spinlock_t *lock;
};
typedef unsigned long (*clk_calc_rate)(struct clk_hw *hw, unsigned long prate,
int index);
/* clk register routines */
struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
const char *parent_name, unsigned long flags, void __iomem *reg,
const struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl,
u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk);
struct clk *clk_register_frac(const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg,
struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock);
struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned
Annotation
- Immediate include surface: `linux/clk-provider.h`, `linux/spinlock_types.h`, `linux/types.h`.
- Detected declarations: `struct aux_clk_masks`, `struct aux_rate_tbl`, `struct clk_aux`, `struct frac_rate_tbl`, `struct clk_frac`, `struct gpt_rate_tbl`, `struct clk_gpt`, `struct pll_rate_tbl`, `struct clk_vco`, `struct clk_pll`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.