drivers/clk/sprd/sc9860-clk.c

Source file repositories/reference/linux-study-clean/drivers/clk/sprd/sc9860-clk.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/sprd/sc9860-clk.c
Extension
.c
Size
77096 bytes
Lines
2050
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
//
// Spreatrum SC9860 clock driver
//
// Copyright (C) 2017 Spreadtrum, Inc.
// Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>

#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/slab.h>

#include <dt-bindings/clock/sprd,sc9860-clk.h>

#include "common.h"
#include "composite.h"
#include "div.h"
#include "gate.h"
#include "mux.h"
#include "pll.h"

static CLK_FIXED_FACTOR(fac_4m,		"fac-4m",	"ext-26m",
			6, 1, 0);
static CLK_FIXED_FACTOR(fac_2m,		"fac-2m",	"ext-26m",
			13, 1, 0);
static CLK_FIXED_FACTOR(fac_1m,		"fac-1m",	"ext-26m",
			26, 1, 0);
static CLK_FIXED_FACTOR(fac_250k,	"fac-250k",	"ext-26m",
			104, 1, 0);
static CLK_FIXED_FACTOR(fac_rpll0_26m,	"rpll0-26m",	"ext-26m",
			1, 1, 0);
static CLK_FIXED_FACTOR(fac_rpll1_26m,	"rpll1-26m",	"ext-26m",
			1, 1, 0);
static CLK_FIXED_FACTOR(fac_rco_25m,	"rco-25m",	"ext-rc0-100m",
			4, 1, 0);
static CLK_FIXED_FACTOR(fac_rco_4m,	"rco-4m",	"ext-rc0-100m",
			25, 1, 0);
static CLK_FIXED_FACTOR(fac_rco_2m,	"rco-2m",	"ext-rc0-100m",
			50, 1, 0);
static CLK_FIXED_FACTOR(fac_3k2,	"fac-3k2",	"ext-32k",
			10, 1, 0);
static CLK_FIXED_FACTOR(fac_1k,		"fac-1k",	"ext-32k",
			32, 1, 0);

static SPRD_SC_GATE_CLK(mpll0_gate,	"mpll0-gate",	"ext-26m", 0xb0,
		     0x1000, BIT(2), CLK_IGNORE_UNUSED, 0);
static SPRD_SC_GATE_CLK(mpll1_gate,	"mpll1-gate",	"ext-26m", 0xb0,
		     0x1000, BIT(18), CLK_IGNORE_UNUSED, 0);
static SPRD_SC_GATE_CLK(dpll0_gate,	"dpll0-gate",	"ext-26m", 0xb4,
		     0x1000, BIT(2), CLK_IGNORE_UNUSED, 0);
static SPRD_SC_GATE_CLK(dpll1_gate,	"dpll1-gate",	"ext-26m", 0xb4,
		     0x1000, BIT(18), CLK_IGNORE_UNUSED, 0);
static SPRD_SC_GATE_CLK(ltepll0_gate,	"ltepll0-gate",	"ext-26m", 0xb8,
		     0x1000, BIT(2), CLK_IGNORE_UNUSED, 0);
static SPRD_SC_GATE_CLK(twpll_gate,	"twpll-gate",	"ext-26m", 0xbc,
		     0x1000, BIT(2), CLK_IGNORE_UNUSED, 0);
static SPRD_SC_GATE_CLK(ltepll1_gate,	"ltepll1-gate",	"ext-26m", 0x10c,
		     0x1000, BIT(2), CLK_IGNORE_UNUSED, 0);
static SPRD_SC_GATE_CLK(rpll0_gate,	"rpll0-gate",	"ext-26m", 0x16c,
		     0x1000, BIT(2), 0, 0);
static SPRD_SC_GATE_CLK(rpll1_gate,	"rpll1-gate",	"ext-26m", 0x16c,
		     0x1000, BIT(18), 0, 0);
static SPRD_SC_GATE_CLK(cppll_gate,	"cppll-gate",	"ext-26m", 0x2b4,
		     0x1000, BIT(2), CLK_IGNORE_UNUSED, 0);
static SPRD_SC_GATE_CLK(gpll_gate,	"gpll-gate",	"ext-26m", 0x32c,
		0x1000, BIT(0), CLK_IGNORE_UNUSED, CLK_GATE_SET_TO_DISABLE);

static struct sprd_clk_common *sc9860_pmu_gate_clks[] = {
	/* address base is 0x402b0000 */
	&mpll0_gate.common,
	&mpll1_gate.common,
	&dpll0_gate.common,
	&dpll1_gate.common,
	&ltepll0_gate.common,
	&twpll_gate.common,
	&ltepll1_gate.common,
	&rpll0_gate.common,
	&rpll1_gate.common,
	&cppll_gate.common,
	&gpll_gate.common,
};

static struct clk_hw_onecell_data sc9860_pmu_gate_hws = {
	.hws	= {
		[CLK_FAC_4M]		= &fac_4m.hw,
		[CLK_FAC_2M]		= &fac_2m.hw,
		[CLK_FAC_1M]		= &fac_1m.hw,

Annotation

Implementation Notes