drivers/clk/st/clkgen-mux.c
Source file repositories/reference/linux-study-clean/drivers/clk/st/clkgen-mux.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/st/clkgen-mux.c- Extension
.c- Size
- 2556 bytes
- Lines
- 112
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/slab.hlinux/io.hlinux/of_address.hlinux/clk.hlinux/clk-provider.hclkgen.h
Detected Declarations
struct clkgen_mux_datafunction Copyrightfunction st_of_clkgen_mux_setupfunction st_of_clkgen_a9_mux_setup
Annotated Snippet
struct clkgen_mux_data {
u32 offset;
u8 shift;
u8 width;
spinlock_t *lock;
unsigned long clk_flags;
u8 mux_flags;
};
static struct clkgen_mux_data stih407_a9_mux_data = {
.offset = 0x1a4,
.shift = 0,
.width = 2,
.lock = &clkgen_a9_lock,
};
static void __init st_of_clkgen_mux_setup(struct device_node *np,
struct clkgen_mux_data *data)
{
struct clk *clk;
void __iomem *reg;
const char **parents;
int num_parents = 0;
struct device_node *parent_np;
/*
* First check for reg property within the node to keep backward
* compatibility, then if reg doesn't exist look at the parent node
*/
reg = of_iomap(np, 0);
if (!reg) {
parent_np = of_get_parent(np);
reg = of_iomap(parent_np, 0);
of_node_put(parent_np);
if (!reg) {
pr_err("%s: Failed to get base address\n", __func__);
return;
}
}
parents = clkgen_mux_get_parents(np, &num_parents);
if (IS_ERR(parents)) {
pr_err("%s: Failed to get parents (%ld)\n",
__func__, PTR_ERR(parents));
goto err_parents;
}
clk = clk_register_mux(NULL, np->name, parents, num_parents,
data->clk_flags | CLK_SET_RATE_PARENT,
reg + data->offset,
data->shift, data->width, data->mux_flags,
data->lock);
if (IS_ERR(clk))
goto err;
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
__clk_get_name(clk_get_parent(clk)),
(unsigned int)clk_get_rate(clk));
kfree(parents);
of_clk_add_provider(np, of_clk_src_simple_get, clk);
return;
err:
kfree(parents);
err_parents:
iounmap(reg);
}
static void __init st_of_clkgen_a9_mux_setup(struct device_node *np)
{
st_of_clkgen_mux_setup(np, &stih407_a9_mux_data);
}
CLK_OF_DECLARE(clkgen_a9mux, "st,stih407-clkgen-a9-mux",
st_of_clkgen_a9_mux_setup);
Annotation
- Immediate include surface: `linux/slab.h`, `linux/io.h`, `linux/of_address.h`, `linux/clk.h`, `linux/clk-provider.h`, `clkgen.h`.
- Detected declarations: `struct clkgen_mux_data`, `function Copyright`, `function st_of_clkgen_mux_setup`, `function st_of_clkgen_a9_mux_setup`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.