drivers/clk/starfive/clk-starfive-jh7110-pll.c
Source file repositories/reference/linux-study-clean/drivers/clk/starfive/clk-starfive-jh7110-pll.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/starfive/clk-starfive-jh7110-pll.c- Extension
.c- Size
- 13851 bytes
- Lines
- 508
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bits.hlinux/clk-provider.hlinux/debugfs.hlinux/device.hlinux/kernel.hlinux/mfd/syscon.hlinux/platform_device.hlinux/regmap.hdt-bindings/clock/starfive,jh7110-crg.h
Detected Declarations
struct jh7110_pll_presetstruct jh7110_pll_infostruct jh7110_pll_datastruct jh7110_pll_privstruct jh7110_pll_regvalsenum jh7110_pll_modefunction jh7110_pll_regvals_getfunction jh7110_pll_recalc_ratefunction jh7110_pll_determine_ratefunction jh7110_pll_set_ratefunction jh7110_pll_registers_readfunction jh7110_pll_registers_openfunction jh7110_pll_debug_initfunction jh7110_pll_probe
Annotated Snippet
static const struct file_operations jh7110_pll_registers_ops = {
.owner = THIS_MODULE,
.open = jh7110_pll_registers_open,
.release = single_release,
.read = seq_read,
.llseek = seq_lseek
};
static void jh7110_pll_debug_init(struct clk_hw *hw, struct dentry *dentry)
{
struct jh7110_pll_data *pll = jh7110_pll_data_from(hw);
debugfs_create_file("registers", 0400, dentry, pll,
&jh7110_pll_registers_ops);
}
#else
#define jh7110_pll_debug_init NULL
#endif
static const struct clk_ops jh7110_pll_ops = {
.recalc_rate = jh7110_pll_recalc_rate,
.determine_rate = jh7110_pll_determine_rate,
.set_rate = jh7110_pll_set_rate,
.debug_init = jh7110_pll_debug_init,
};
static struct clk_hw *jh7110_pll_get(struct of_phandle_args *clkspec, void *data)
{
struct jh7110_pll_priv *priv = data;
unsigned int idx = clkspec->args[0];
if (idx < JH7110_PLLCLK_END)
return &priv->pll[idx].hw;
return ERR_PTR(-EINVAL);
}
static int __init jh7110_pll_probe(struct platform_device *pdev)
{
struct jh7110_pll_priv *priv;
unsigned int idx;
int ret;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->dev = &pdev->dev;
priv->regmap = syscon_node_to_regmap(priv->dev->of_node->parent);
if (IS_ERR(priv->regmap))
return PTR_ERR(priv->regmap);
for (idx = 0; idx < JH7110_PLLCLK_END; idx++) {
struct clk_parent_data parents = {
.index = 0,
};
struct clk_init_data init = {
.name = jh7110_plls[idx].name,
.ops = &jh7110_pll_ops,
.parent_data = &parents,
.num_parents = 1,
.flags = 0,
};
struct jh7110_pll_data *pll = &priv->pll[idx];
pll->hw.init = &init;
pll->idx = idx;
ret = devm_clk_hw_register(&pdev->dev, &pll->hw);
if (ret)
return ret;
}
return devm_of_clk_add_hw_provider(&pdev->dev, jh7110_pll_get, priv);
}
static const struct of_device_id jh7110_pll_match[] = {
{ .compatible = "starfive,jh7110-pll" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, jh7110_pll_match);
static struct platform_driver jh7110_pll_driver = {
.driver = {
.name = "clk-starfive-jh7110-pll",
.of_match_table = jh7110_pll_match,
},
};
builtin_platform_driver_probe(jh7110_pll_driver, jh7110_pll_probe);
Annotation
- Immediate include surface: `linux/bits.h`, `linux/clk-provider.h`, `linux/debugfs.h`, `linux/device.h`, `linux/kernel.h`, `linux/mfd/syscon.h`, `linux/platform_device.h`, `linux/regmap.h`.
- Detected declarations: `struct jh7110_pll_preset`, `struct jh7110_pll_info`, `struct jh7110_pll_data`, `struct jh7110_pll_priv`, `struct jh7110_pll_regvals`, `enum jh7110_pll_mode`, `function jh7110_pll_regvals_get`, `function jh7110_pll_recalc_rate`, `function jh7110_pll_determine_rate`, `function jh7110_pll_set_rate`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: pattern implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.