drivers/clk/stm32/stm32mp13_rcc.h

Source file repositories/reference/linux-study-clean/drivers/clk/stm32/stm32mp13_rcc.h

File Facts

System
Linux kernel
Corpus path
drivers/clk/stm32/stm32mp13_rcc.h
Extension
.h
Size
62057 bytes
Lines
1749
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef STM32MP13_RCC_H
#define STM32MP13_RCC_H
/* RCC registers */
#define RCC_SECCFGR			0x0
#define RCC_MP_SREQSETR			0x100
#define RCC_MP_SREQCLRR			0x104
#define RCC_MP_APRSTCR			0x108
#define RCC_MP_APRSTSR			0x10c
#define RCC_PWRLPDLYCR			0x110
#define RCC_MP_GRSTCSETR		0x114
#define RCC_BR_RSTSCLRR			0x118
#define RCC_MP_RSTSSETR			0x11c
#define RCC_MP_RSTSCLRR			0x120
#define RCC_MP_IWDGFZSETR		0x124
#define RCC_MP_IWDGFZCLRR		0x128
#define RCC_MP_CIER			0x200
#define RCC_MP_CIFR			0x204
#define RCC_BDCR			0x400
#define RCC_RDLSICR			0x404
#define RCC_OCENSETR			0x420
#define RCC_OCENCLRR			0x424
#define RCC_OCRDYR			0x428
#define RCC_HSICFGR			0x440
#define RCC_CSICFGR			0x444
#define RCC_MCO1CFGR			0x460
#define RCC_MCO2CFGR			0x464
#define RCC_DBGCFGR			0x468
#define RCC_RCK12SELR			0x480
#define RCC_RCK3SELR			0x484
#define RCC_RCK4SELR			0x488
#define RCC_PLL1CR			0x4a0
#define RCC_PLL1CFGR1			0x4a4
#define RCC_PLL1CFGR2			0x4a8
#define RCC_PLL1FRACR			0x4ac
#define RCC_PLL1CSGR			0x4b0
#define RCC_PLL2CR			0x4d0
#define RCC_PLL2CFGR1			0x4d4
#define RCC_PLL2CFGR2			0x4d8
#define RCC_PLL2FRACR			0x4dc
#define RCC_PLL2CSGR			0x4e0
#define RCC_PLL3CR			0x500
#define RCC_PLL3CFGR1			0x504
#define RCC_PLL3CFGR2			0x508
#define RCC_PLL3FRACR			0x50c
#define RCC_PLL3CSGR			0x510
#define RCC_PLL4CR			0x520
#define RCC_PLL4CFGR1			0x524
#define RCC_PLL4CFGR2			0x528
#define RCC_PLL4FRACR			0x52c
#define RCC_PLL4CSGR			0x530
#define RCC_MPCKSELR			0x540
#define RCC_ASSCKSELR			0x544
#define RCC_MSSCKSELR			0x548
#define RCC_CPERCKSELR			0x54c
#define RCC_RTCDIVR			0x560
#define RCC_MPCKDIVR			0x564
#define RCC_AXIDIVR			0x568
#define RCC_MLAHBDIVR			0x56c
#define RCC_APB1DIVR			0x570
#define RCC_APB2DIVR			0x574
#define RCC_APB3DIVR			0x578
#define RCC_APB4DIVR			0x57c
#define RCC_APB5DIVR			0x580
#define RCC_APB6DIVR			0x584
#define RCC_TIMG1PRER			0x5a0
#define RCC_TIMG2PRER			0x5a4
#define RCC_TIMG3PRER			0x5a8
#define RCC_DDRITFCR			0x5c0
#define RCC_I2C12CKSELR			0x600
#define RCC_I2C345CKSELR		0x604
#define RCC_SPI2S1CKSELR		0x608
#define RCC_SPI2S23CKSELR		0x60c
#define RCC_SPI45CKSELR			0x610
#define RCC_UART12CKSELR		0x614
#define RCC_UART35CKSELR		0x618
#define RCC_UART4CKSELR			0x61c
#define RCC_UART6CKSELR			0x620
#define RCC_UART78CKSELR		0x624
#define RCC_LPTIM1CKSELR		0x628
#define RCC_LPTIM23CKSELR		0x62c
#define RCC_LPTIM45CKSELR		0x630
#define RCC_SAI1CKSELR			0x634
#define RCC_SAI2CKSELR			0x638
#define RCC_FDCANCKSELR			0x63c
#define RCC_SPDIFCKSELR			0x640
#define RCC_ADC12CKSELR			0x644
#define RCC_SDMMC12CKSELR		0x648
#define RCC_ETH12CKSELR			0x64c
#define RCC_USBCKSELR			0x650
#define RCC_QSPICKSELR			0x654

Annotation

Implementation Notes