drivers/clk/sunxi-ng/ccu_gate.h

Source file repositories/reference/linux-study-clean/drivers/clk/sunxi-ng/ccu_gate.h

File Facts

System
Linux kernel
Corpus path
drivers/clk/sunxi-ng/ccu_gate.h
Extension
.h
Size
3160 bytes
Lines
128
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ccu_gate {
	u32			enable;

	struct ccu_common	common;
};

#define SUNXI_CCU_GATE(_struct, _name, _parent, _reg, _gate, _flags)	\
	struct ccu_gate _struct = {					\
		.enable	= _gate,					\
		.common	= {						\
			.reg		= _reg,				\
			.hw.init	= CLK_HW_INIT(_name,		\
						      _parent,		\
						      &ccu_gate_ops,	\
						      _flags),		\
		}							\
	}

#define SUNXI_CCU_GATE_HW(_struct, _name, _parent, _reg, _gate, _flags)	\
	struct ccu_gate _struct = {					\
		.enable	= _gate,					\
		.common	= {						\
			.reg		= _reg,				\
			.hw.init	= CLK_HW_INIT_HW(_name,		\
							 _parent,	\
							 &ccu_gate_ops,	\
							 _flags),	\
		}							\
	}

#define SUNXI_CCU_GATE_FW(_struct, _name, _parent, _reg, _gate, _flags)	\
	struct ccu_gate _struct = {					\
		.enable	= _gate,					\
		.common	= {						\
			.reg		= _reg,				\
			.hw.init	= CLK_HW_INIT_FW_NAME(_name,	\
							      _parent,	\
							      &ccu_gate_ops, \
							      _flags),	\
		}							\
	}

/*
 * The following macros allow the re-use of the data structure
 * holding the parent info.
 */
#define SUNXI_CCU_GATE_HWS(_struct, _name, _parent, _reg, _gate, _flags) \
	struct ccu_gate _struct = {					\
		.enable	= _gate,					\
		.common	= {						\
			.reg		= _reg,				\
			.hw.init	= CLK_HW_INIT_HWS(_name,	\
							  _parent,	\
							  &ccu_gate_ops, \
							  _flags),	\
		}							\
	}

#define SUNXI_CCU_GATE_HWS_WITH_PREDIV(_struct, _name, _parent, _reg,	\
				       _gate, _prediv, _flags)		\
	struct ccu_gate _struct = {					\
		.enable	= _gate,					\
		.common	= {						\
			.reg		= _reg,				\
			.prediv		= _prediv,			\
			.features	= CCU_FEATURE_ALL_PREDIV,	\
			.hw.init	= CLK_HW_INIT_HWS(_name,	\
							  _parent,	\
							  &ccu_gate_ops, \
							  _flags),	\
		}							\
	}

#define SUNXI_CCU_GATE_DATA(_struct, _name, _data, _reg, _gate, _flags)	\
	struct ccu_gate _struct = {					\
		.enable	= _gate,					\
		.common	= {						\
			.reg		= _reg,				\
			.hw.init	=				\
				CLK_HW_INIT_PARENTS_DATA(_name,		\
							 _data,		\
							 &ccu_gate_ops,	\
							 _flags),	\
		}							\
	}

#define SUNXI_CCU_GATE_DATA_WITH_PREDIV(_struct, _name, _parent, _reg,	\
					_gate, _prediv, _flags)		\
	struct ccu_gate _struct = {					\
		.enable	= _gate,					\

Annotation

Implementation Notes