drivers/clk/sunxi-ng/ccu_mmc_timing.c
Source file repositories/reference/linux-study-clean/drivers/clk/sunxi-ng/ccu_mmc_timing.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/sunxi-ng/ccu_mmc_timing.c- Extension
.c- Size
- 1644 bytes
- Lines
- 64
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk-provider.hlinux/clk/sunxi-ng.hlinux/io.hccu_common.h
Detected Declarations
function Copyrightfunction sunxi_ccu_get_mmc_timing_modeexport sunxi_ccu_set_mmc_timing_modeexport sunxi_ccu_get_mmc_timing_mode
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
*/
#include <linux/clk-provider.h>
#include <linux/clk/sunxi-ng.h>
#include <linux/io.h>
#include "ccu_common.h"
/**
* sunxi_ccu_set_mmc_timing_mode - Configure the MMC clock timing mode
* @clk: clock to be configured
* @new_mode: true for new timing mode introduced in A83T and later
*
* Return: %0 on success, %-ENOTSUPP if the clock does not support
* switching modes.
*/
int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode)
{
struct clk_hw *hw = __clk_get_hw(clk);
struct ccu_common *cm = hw_to_ccu_common(hw);
unsigned long flags;
u32 val;
if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
return -ENOTSUPP;
spin_lock_irqsave(cm->lock, flags);
val = readl(cm->base + cm->reg);
if (new_mode)
val |= CCU_MMC_NEW_TIMING_MODE;
else
val &= ~CCU_MMC_NEW_TIMING_MODE;
writel(val, cm->base + cm->reg);
spin_unlock_irqrestore(cm->lock, flags);
return 0;
}
EXPORT_SYMBOL_GPL(sunxi_ccu_set_mmc_timing_mode);
/**
* sunxi_ccu_get_mmc_timing_mode: Get the current MMC clock timing mode
* @clk: clock to query
*
* Return: %0 if the clock is in old timing mode, > %0 if it is in
* new timing mode, and %-ENOTSUPP if the clock does not support
* this function.
*/
int sunxi_ccu_get_mmc_timing_mode(struct clk *clk)
{
struct clk_hw *hw = __clk_get_hw(clk);
struct ccu_common *cm = hw_to_ccu_common(hw);
if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
return -ENOTSUPP;
return !!(readl(cm->base + cm->reg) & CCU_MMC_NEW_TIMING_MODE);
}
EXPORT_SYMBOL_GPL(sunxi_ccu_get_mmc_timing_mode);
Annotation
- Immediate include surface: `linux/clk-provider.h`, `linux/clk/sunxi-ng.h`, `linux/io.h`, `ccu_common.h`.
- Detected declarations: `function Copyright`, `function sunxi_ccu_get_mmc_timing_mode`, `export sunxi_ccu_set_mmc_timing_mode`, `export sunxi_ccu_get_mmc_timing_mode`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.