drivers/clk/sunxi-ng/ccu_mux.h

Source file repositories/reference/linux-study-clean/drivers/clk/sunxi-ng/ccu_mux.h

File Facts

System
Linux kernel
Corpus path
drivers/clk/sunxi-ng/ccu_mux.h
Extension
.h
Size
4576 bytes
Lines
165
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ccu_mux_fixed_prediv {
	u8	index;
	u16	div;
};

struct ccu_mux_var_prediv {
	u8	index;
	u8	shift;
	u8	width;
};

struct ccu_mux_internal {
	u8		shift;
	u8		width;
	const u8	*table;

	const struct ccu_mux_fixed_prediv	*fixed_predivs;
	u8		n_predivs;

	const struct ccu_mux_var_prediv		*var_predivs;
	u8		n_var_predivs;
};

#define _SUNXI_CCU_MUX_TABLE(_shift, _width, _table)	\
	{						\
		.shift	= _shift,			\
		.width	= _width,			\
		.table	= _table,			\
	}

#define _SUNXI_CCU_MUX(_shift, _width) \
	_SUNXI_CCU_MUX_TABLE(_shift, _width, NULL)

struct ccu_mux {
	u32			enable;

	struct ccu_mux_internal	mux;
	struct ccu_common	common;
};

#define SUNXI_CCU_MUX_TABLE_WITH_GATE_FEAT(_struct, _name, _parents, _table,	\
				     _reg, _shift, _width, _gate,		\
				     _flags, _features)				\
	struct ccu_mux _struct = {						\
		.enable	= _gate,						\
		.mux	= _SUNXI_CCU_MUX_TABLE(_shift, _width, _table),		\
		.common	= {							\
			.reg		= _reg,					\
			.hw.init	= CLK_HW_INIT_PARENTS(_name,		\
							      _parents,		\
							      &ccu_mux_ops,	\
							      _flags),		\
			.features	= _features,				\
		}								\
	}

#define SUNXI_CCU_MUX_TABLE_WITH_GATE_CLOSEST(_struct, _name, _parents,	\
					      _table, _reg, _shift,	\
					      _width, _gate, _flags)	\
	SUNXI_CCU_MUX_TABLE_WITH_GATE_FEAT(_struct, _name, _parents,	\
					   _table, _reg, _shift,	\
					   _width, _gate, _flags,	\
					   CCU_FEATURE_CLOSEST_RATE)

#define SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, _table,	\
				     _reg, _shift, _width, _gate,	\
				     _flags)				\
	SUNXI_CCU_MUX_TABLE_WITH_GATE_FEAT(_struct, _name, _parents,	\
					   _table, _reg, _shift,	\
					   _width, _gate, _flags, 0)

#define SUNXI_CCU_MUX_WITH_GATE(_struct, _name, _parents, _reg,		\
				_shift, _width, _gate, _flags)		\
	SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, NULL,	\
				      _reg, _shift, _width, _gate,	\
				      _flags)

#define SUNXI_CCU_MUX(_struct, _name, _parents, _reg, _shift, _width,	\
		      _flags)						\
	SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, NULL,	\
				      _reg, _shift, _width, 0, _flags)

#define SUNXI_CCU_MUX_DATA_WITH_GATE(_struct, _name, _parents, _reg,	\
				     _shift, _width, _gate, _flags)	\
	struct ccu_mux _struct = {					\
		.enable	= _gate,					\
		.mux	= _SUNXI_CCU_MUX(_shift, _width),		\
		.common	= {						\
			.reg		= _reg,				\
			.hw.init	= CLK_HW_INIT_PARENTS_DATA(_name, \

Annotation

Implementation Notes