drivers/clk/tegra/clk-tegra-fixed.c
Source file repositories/reference/linux-study-clean/drivers/clk/tegra/clk-tegra-fixed.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/tegra/clk-tegra-fixed.c- Extension
.c- Size
- 2674 bytes
- Lines
- 119
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/io.hlinux/clk-provider.hlinux/of.hlinux/of_address.hlinux/delay.hlinux/export.hlinux/clk/tegra.hclk.hclk-id.h
Detected Declarations
function tegra_osc_clk_initfunction tegra_fixed_clk_initfunction tegra_clk_osc_resume
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2012, 2013, NVIDIA CORPORATION. All rights reserved.
*/
#include <linux/io.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/delay.h>
#include <linux/export.h>
#include <linux/clk/tegra.h>
#include "clk.h"
#include "clk-id.h"
#define OSC_CTRL 0x50
#define OSC_CTRL_OSC_FREQ_SHIFT 28
#define OSC_CTRL_PLL_REF_DIV_SHIFT 26
#define OSC_CTRL_MASK (0x3f2 | \
(0xf << OSC_CTRL_OSC_FREQ_SHIFT))
static u32 osc_ctrl_ctx;
int __init tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *clks,
unsigned long *input_freqs, unsigned int num,
unsigned int clk_m_div, unsigned long *osc_freq,
unsigned long *pll_ref_freq)
{
struct clk *clk, *osc;
struct clk **dt_clk;
u32 val, pll_ref_div;
unsigned osc_idx;
val = readl_relaxed(clk_base + OSC_CTRL);
osc_ctrl_ctx = val & OSC_CTRL_MASK;
osc_idx = val >> OSC_CTRL_OSC_FREQ_SHIFT;
if (osc_idx < num)
*osc_freq = input_freqs[osc_idx];
else
*osc_freq = 0;
if (!*osc_freq) {
WARN_ON(1);
return -EINVAL;
}
dt_clk = tegra_lookup_dt_id(tegra_clk_osc, clks);
if (!dt_clk)
return 0;
osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq);
*dt_clk = osc;
/* osc_div2 */
dt_clk = tegra_lookup_dt_id(tegra_clk_osc_div2, clks);
if (dt_clk) {
clk = clk_register_fixed_factor(NULL, "osc_div2", "osc",
0, 1, 2);
*dt_clk = clk;
}
/* osc_div4 */
dt_clk = tegra_lookup_dt_id(tegra_clk_osc_div4, clks);
if (dt_clk) {
clk = clk_register_fixed_factor(NULL, "osc_div4", "osc",
0, 1, 4);
*dt_clk = clk;
}
dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m, clks);
if (!dt_clk)
return 0;
clk = clk_register_fixed_factor(NULL, "clk_m", "osc",
0, 1, clk_m_div);
*dt_clk = clk;
/* pll_ref */
val = (val >> OSC_CTRL_PLL_REF_DIV_SHIFT) & 3;
pll_ref_div = 1 << val;
dt_clk = tegra_lookup_dt_id(tegra_clk_pll_ref, clks);
if (!dt_clk)
return 0;
clk = clk_register_fixed_factor(NULL, "pll_ref", "osc",
0, 1, pll_ref_div);
*dt_clk = clk;
Annotation
- Immediate include surface: `linux/io.h`, `linux/clk-provider.h`, `linux/of.h`, `linux/of_address.h`, `linux/delay.h`, `linux/export.h`, `linux/clk/tegra.h`, `clk.h`.
- Detected declarations: `function tegra_osc_clk_init`, `function tegra_fixed_clk_init`, `function tegra_clk_osc_resume`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.