drivers/clk/tegra/cvb.c
Source file repositories/reference/linux-study-clean/drivers/clk/tegra/cvb.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/tegra/cvb.c- Extension
.c- Size
- 4002 bytes
- Lines
- 143
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/err.hlinux/kernel.hlinux/pm_opp.hcvb.h
Detected Declarations
function Copyrightfunction round_cvb_voltagefunction round_voltagefunction build_opp_tablefunction modulefunction tegra_cvb_remove_opp_table
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Utility functions for parsing Tegra CVB voltage tables
*
* Copyright (C) 2012-2019 NVIDIA Corporation. All rights reserved.
*/
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/pm_opp.h>
#include "cvb.h"
/* cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) */
static inline int get_cvb_voltage(int speedo, int s_scale,
const struct cvb_coefficients *cvb)
{
int mv;
/* apply only speedo scale: output mv = cvb_mv * v_scale */
mv = DIV_ROUND_CLOSEST(cvb->c2 * speedo, s_scale);
mv = DIV_ROUND_CLOSEST((mv + cvb->c1) * speedo, s_scale) + cvb->c0;
return mv;
}
static int round_cvb_voltage(int mv, int v_scale,
const struct rail_alignment *align)
{
/* combined: apply voltage scale and round to cvb alignment step */
int uv;
int step = (align->step_uv ? : 1000) * v_scale;
int offset = align->offset_uv * v_scale;
uv = max(mv * 1000, offset) - offset;
uv = DIV_ROUND_UP(uv, step) * align->step_uv + align->offset_uv;
return uv / 1000;
}
enum {
DOWN,
UP
};
static int round_voltage(int mv, const struct rail_alignment *align, int up)
{
if (align->step_uv) {
int uv;
uv = max(mv * 1000, align->offset_uv) - align->offset_uv;
uv = (uv + (up ? align->step_uv - 1 : 0)) / align->step_uv;
return (uv * align->step_uv + align->offset_uv) / 1000;
}
return mv;
}
static int build_opp_table(struct device *dev, const struct cvb_table *table,
struct rail_alignment *align,
int speedo_value, unsigned long max_freq)
{
int i, ret, dfll_mv, min_mv, max_mv;
min_mv = round_voltage(table->min_millivolts, align, UP);
max_mv = round_voltage(table->max_millivolts, align, DOWN);
for (i = 0; i < MAX_DVFS_FREQS; i++) {
const struct cvb_table_freq_entry *entry = &table->entries[i];
if (!entry->freq || (entry->freq > max_freq))
break;
dfll_mv = get_cvb_voltage(speedo_value, table->speedo_scale,
&entry->coefficients);
dfll_mv = round_cvb_voltage(dfll_mv, table->voltage_scale,
align);
dfll_mv = clamp(dfll_mv, min_mv, max_mv);
ret = dev_pm_opp_add(dev, entry->freq, dfll_mv * 1000);
if (ret)
return ret;
}
return 0;
}
/**
* tegra_cvb_add_opp_table - build OPP table from Tegra CVB tables
* @dev: the struct device * for which the OPP table is built
* @tables: array of CVB tables
* @count: size of the previously mentioned array
* @align: parameters of the regulator step and offset
* @process_id: process id of the HW module
Annotation
- Immediate include surface: `linux/err.h`, `linux/kernel.h`, `linux/pm_opp.h`, `cvb.h`.
- Detected declarations: `function Copyright`, `function round_cvb_voltage`, `function round_voltage`, `function build_opp_table`, `function module`, `function tegra_cvb_remove_opp_table`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.