drivers/clk/thead/clk-th1520-ap.c
Source file repositories/reference/linux-study-clean/drivers/clk/thead/clk-th1520-ap.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/thead/clk-th1520-ap.c- Extension
.c- Size
- 43304 bytes
- Lines
- 1645
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dt-bindings/clock/thead,th1520-clk-ap.hlinux/bitfield.hlinux/clk.hlinux/clk-provider.hlinux/delay.hlinux/device.hlinux/minmax.hlinux/module.hlinux/platform_device.hlinux/regmap.h
Detected Declarations
struct ccu_internalstruct ccu_div_internalstruct ccu_commonstruct ccu_muxstruct ccu_gatestruct ccu_divstruct ccu_pll_cfgstruct ccu_pllstruct th1520_plat_datafunction ccu_get_parent_helperfunction ccu_set_parent_helperfunction ccu_disable_helperfunction ccu_enable_helperfunction ccu_is_enabled_helperfunction ccu_div_recalc_ratefunction ccu_div_determine_ratefunction ccu_div_set_ratefunction ccu_div_get_parentfunction ccu_div_set_parentfunction ccu_div_disablefunction ccu_div_enablefunction ccu_div_is_enabledfunction ccu_pll_disablefunction ccu_pll_enablefunction ccu_pll_is_enabledfunction th1520_pll_vco_recalc_ratefunction th1520_pll_postdiv_recalc_ratefunction ccu_pll_recalc_ratefunction ccu_pll_determine_ratefunction ccu_pll_set_ratefunction c910_clk_get_parentfunction c910_clk_set_parentfunction c910_clk_recalc_ratefunction c910_clk_determine_ratefunction c910_clk_set_ratefunction c910_clk_set_rate_and_parentfunction TH1520_C910_BUS_MAX_RATEfunction c910_clk_notifier_cbfunction th1520_clk_probe
Annotated Snippet
struct ccu_internal {
u8 shift;
u8 width;
};
struct ccu_div_internal {
u8 shift;
u8 width;
u32 flags;
};
struct ccu_common {
int clkid;
struct regmap *map;
u16 cfg0;
u16 cfg1;
struct clk_hw hw;
};
struct ccu_mux {
int clkid;
u32 reg;
struct clk_mux mux;
};
struct ccu_gate {
int clkid;
u32 reg;
struct clk_gate gate;
};
struct ccu_div {
u32 enable;
u32 div_en;
struct ccu_div_internal div;
struct ccu_internal mux;
struct ccu_common common;
};
struct ccu_pll_cfg {
unsigned long freq;
u32 fbdiv;
u32 frac;
u32 postdiv1;
u32 postdiv2;
};
struct ccu_pll {
struct ccu_common common;
u32 lock_sts_mask;
int cfgnum;
const struct ccu_pll_cfg *cfgs;
};
#define TH_CCU_ARG(_shift, _width) \
{ \
.shift = _shift, \
.width = _width, \
}
#define TH_CCU_DIV_FLAGS(_shift, _width, _flags) \
{ \
.shift = _shift, \
.width = _width, \
.flags = _flags, \
}
#define TH_CCU_MUX_FLAGS(_name, _parents, _shift, _width, _flags, \
_mux_flags) \
{ \
.mask = GENMASK(_width - 1, 0), \
.shift = _shift, \
.flags = _mux_flags, \
.hw.init = CLK_HW_INIT_PARENTS_DATA( \
_name, \
_parents, \
&clk_mux_ops, \
_flags), \
}
#define TH_CCU_MUX(_name, _parents, _shift, _width) \
TH_CCU_MUX_FLAGS(_name, _parents, _shift, _width, 0, 0)
#define CCU_GATE(_clkid, _struct, _name, _parent, _reg, _bit, _flags) \
struct ccu_gate _struct = { \
.clkid = _clkid, \
.reg = _reg, \
.gate = { \
.bit_idx = _bit, \
.hw.init = CLK_HW_INIT_PARENTS_DATA( \
Annotation
- Immediate include surface: `dt-bindings/clock/thead,th1520-clk-ap.h`, `linux/bitfield.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/delay.h`, `linux/device.h`, `linux/minmax.h`, `linux/module.h`.
- Detected declarations: `struct ccu_internal`, `struct ccu_div_internal`, `struct ccu_common`, `struct ccu_mux`, `struct ccu_gate`, `struct ccu_div`, `struct ccu_pll_cfg`, `struct ccu_pll`, `struct th1520_plat_data`, `function ccu_get_parent_helper`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.