drivers/clk/ti/clk-44xx.c

Source file repositories/reference/linux-study-clean/drivers/clk/ti/clk-44xx.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/ti/clk-44xx.c
Extension
.c
Size
29242 bytes
Lines
831
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * OMAP4 Clock init
 *
 * Copyright (C) 2013 Texas Instruments, Inc.
 *
 * Tero Kristo (t-kristo@ti.com)
 */

#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk/ti.h>
#include <dt-bindings/clock/omap4.h>

#include "clock.h"

/*
 * OMAP4 ABE DPLL default frequency. In OMAP4460 TRM version V, section
 * "3.6.3.2.3 CM1_ABE Clock Generator" states that the "DPLL_ABE_X2_CLK
 * must be set to 196.608 MHz" and hence, the DPLL locked frequency is
 * half of this value.
 */
#define OMAP4_DPLL_ABE_DEFFREQ				98304000

/*
 * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section
 * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred
 * locked frequency for the USB DPLL is 960MHz.
 */
#define OMAP4_DPLL_USB_DEFFREQ				960000000

static const struct omap_clkctrl_reg_data omap4_mpuss_clkctrl_regs[] __initconst = {
	{ OMAP4_MPU_CLKCTRL, NULL, 0, "dpll_mpu_m2_ck" },
	{ 0 },
};

static const struct omap_clkctrl_reg_data omap4_tesla_clkctrl_regs[] __initconst = {
	{ OMAP4_DSP_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_iva_m4x2_ck" },
	{ 0 },
};

static const char * const omap4_aess_fclk_parents[] __initconst = {
	"abe_clk",
	NULL,
};

static const struct omap_clkctrl_div_data omap4_aess_fclk_data __initconst = {
	.max_div = 2,
};

static const struct omap_clkctrl_bit_data omap4_aess_bit_data[] __initconst = {
	{ 24, TI_CLK_DIVIDER, omap4_aess_fclk_parents, &omap4_aess_fclk_data },
	{ 0 },
};

static const char * const omap4_func_dmic_abe_gfclk_parents[] __initconst = {
	"abe-clkctrl:0018:26",
	"pad_clks_ck",
	"slimbus_clk",
	NULL,
};

static const char * const omap4_dmic_sync_mux_ck_parents[] __initconst = {
	"abe_24m_fclk",
	"syc_clk_div_ck",
	"func_24m_clk",
	NULL,
};

static const struct omap_clkctrl_bit_data omap4_dmic_bit_data[] __initconst = {
	{ 24, TI_CLK_MUX, omap4_func_dmic_abe_gfclk_parents, NULL },
	{ 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
	{ 0 },
};

static const char * const omap4_func_mcasp_abe_gfclk_parents[] __initconst = {
	"abe-clkctrl:0020:26",
	"pad_clks_ck",
	"slimbus_clk",
	NULL,
};

static const struct omap_clkctrl_bit_data omap4_mcasp_bit_data[] __initconst = {
	{ 24, TI_CLK_MUX, omap4_func_mcasp_abe_gfclk_parents, NULL },
	{ 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
	{ 0 },
};

Annotation

Implementation Notes