drivers/clk/ti/clk-7xx.c

Source file repositories/reference/linux-study-clean/drivers/clk/ti/clk-7xx.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/ti/clk-7xx.c
Extension
.c
Size
36133 bytes
Lines
977
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * DRA7 Clock init
 *
 * Copyright (C) 2013 Texas Instruments, Inc.
 *
 * Tero Kristo (t-kristo@ti.com)
 */

#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk/ti.h>
#include <dt-bindings/clock/dra7.h>

#include "clock.h"

#define DRA7_DPLL_GMAC_DEFFREQ				1000000000
#define DRA7_DPLL_USB_DEFFREQ				960000000

static const struct omap_clkctrl_reg_data dra7_mpu_clkctrl_regs[] __initconst = {
	{ DRA7_MPU_MPU_CLKCTRL, NULL, 0, "dpll_mpu_m2_ck" },
	{ 0 },
};

static const struct omap_clkctrl_reg_data dra7_dsp1_clkctrl_regs[] __initconst = {
	{ DRA7_DSP1_MMU0_DSP1_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_dsp_m2_ck" },
	{ 0 },
};

static const char * const dra7_ipu1_gfclk_mux_parents[] __initconst = {
	"dpll_abe_m2x2_ck",
	"dpll_core_h22x2_ck",
	NULL,
};

static const struct omap_clkctrl_bit_data dra7_mmu_ipu1_bit_data[] __initconst = {
	{ 24, TI_CLK_MUX, dra7_ipu1_gfclk_mux_parents, NULL },
	{ 0 },
};

static const struct omap_clkctrl_reg_data dra7_ipu1_clkctrl_regs[] __initconst = {
	{ DRA7_IPU1_MMU_IPU1_CLKCTRL, dra7_mmu_ipu1_bit_data, CLKF_HW_SUP | CLKF_NO_IDLEST, "ipu1-clkctrl:0000:24" },
	{ 0 },
};

static const char * const dra7_mcasp1_aux_gfclk_mux_parents[] __initconst = {
	"per_abe_x1_gfclk2_div",
	"video1_clk2_div",
	"video2_clk2_div",
	"hdmi_clk2_div",
	NULL,
};

static const char * const dra7_mcasp1_ahclkx_mux_parents[] __initconst = {
	"abe_24m_fclk",
	"abe_sys_clk_div",
	"func_24m_clk",
	"atl_clkin3_ck",
	"atl_clkin2_ck",
	"atl_clkin1_ck",
	"atl_clkin0_ck",
	"sys_clkin2",
	"ref_clkin0_ck",
	"ref_clkin1_ck",
	"ref_clkin2_ck",
	"ref_clkin3_ck",
	"mlb_clk",
	"mlbp_clk",
	NULL,
};

static const struct omap_clkctrl_bit_data dra7_mcasp1_bit_data[] __initconst = {
	{ 22, TI_CLK_MUX, dra7_mcasp1_aux_gfclk_mux_parents, NULL },
	{ 24, TI_CLK_MUX, dra7_mcasp1_ahclkx_mux_parents, NULL },
	{ 28, TI_CLK_MUX, dra7_mcasp1_ahclkx_mux_parents, NULL },
	{ 0 },
};

static const char * const dra7_timer5_gfclk_mux_parents[] __initconst = {
	"timer_sys_clk_div",
	"sys_32k_ck",
	"sys_clkin2",
	"ref_clkin0_ck",
	"ref_clkin1_ck",
	"ref_clkin2_ck",
	"ref_clkin3_ck",
	"abe_giclk_div",
	"video1_div_clk",

Annotation

Implementation Notes