drivers/clk/ti/clkt_dpll.c
Source file repositories/reference/linux-study-clean/drivers/clk/ti/clkt_dpll.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/ti/clkt_dpll.c- Extension
.c- Size
- 10503 bytes
- Lines
- 372
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/errno.hlinux/clk.hlinux/clk-provider.hlinux/io.hlinux/clk/ti.hasm/div64.hclock.h
Detected Declarations
function Copyrightfunction _dpll_compute_new_ratefunction _dpll_test_multfunction _omap2_dpll_is_in_bypassfunction omap2_init_dpll_parentfunction ratefunction set_rate
Annotated Snippet
if (delta < prev_min_delta) {
prev_min_delta = delta;
min_delta_m = m;
min_delta_n = n;
}
pr_debug("clock: %s: m = %d: n = %d: new_rate = %lu\n",
clk_name, m, n, new_rate);
if (delta == 0)
break;
}
if (prev_min_delta == LONG_MAX) {
pr_debug("clock: %s: cannot round to rate %lu\n",
clk_name, req->rate);
return -EINVAL;
}
dd->last_rounded_m = min_delta_m;
dd->last_rounded_n = min_delta_n;
dd->last_rounded_rate = req->rate - prev_min_delta;
req->rate = dd->last_rounded_rate;
return 0;
}
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/errno.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/io.h`, `linux/clk/ti.h`, `asm/div64.h`, `clock.h`.
- Detected declarations: `function Copyright`, `function _dpll_compute_new_rate`, `function _dpll_test_mult`, `function _omap2_dpll_is_in_bypass`, `function omap2_init_dpll_parent`, `function rate`, `function set_rate`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.