drivers/clk/uniphier/clk-uniphier-sys.c

Source file repositories/reference/linux-study-clean/drivers/clk/uniphier/clk-uniphier-sys.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/uniphier/clk-uniphier-sys.c
Extension
.c
Size
14189 bytes
Lines
350
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (C) 2016 Socionext Inc.
 *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 */

#include <linux/stddef.h>

#include "clk-uniphier.h"

#define UNIPHIER_LD4_SYS_CLK_SD					\
	UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 8),		\
	UNIPHIER_CLK_FACTOR("sd-133m", -1, "vpll27a", 1, 2)

#define UNIPHIER_PRO5_SYS_CLK_SD					\
	UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 12),		\
	UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 18)

#define UNIPHIER_LD20_SYS_CLK_SD					\
	UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 10),		\
	UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 15)

#define UNIPHIER_NX1_SYS_CLK_SD						\
	UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 4),		\
	UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 6)

#define UNIPHIER_LD4_SYS_CLK_NAND(idx)					\
	UNIPHIER_CLK_FACTOR("nand-50m", -1, "spll", 1, 32),		\
	UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x2104, 2)

#define UNIPHIER_PRO5_SYS_CLK_NAND(idx)					\
	UNIPHIER_CLK_FACTOR("nand-50m", -1, "spll", 1, 48),		\
	UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x2104, 2)

#define UNIPHIER_LD11_SYS_CLK_NAND(idx)					\
	UNIPHIER_CLK_FACTOR("nand-50m", -1, "spll", 1, 40),		\
	UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x210c, 0)

#define UNIPHIER_SYS_CLK_NAND_4X(idx)					\
	UNIPHIER_CLK_FACTOR("nand-4x", (idx), "nand", 4, 1)

#define UNIPHIER_LD11_SYS_CLK_EMMC(idx)					\
	UNIPHIER_CLK_GATE("emmc", (idx), NULL, 0x210c, 2)

#define UNIPHIER_LD4_SYS_CLK_STDMAC(idx)				\
	UNIPHIER_CLK_GATE("stdmac", (idx), NULL, 0x2104, 10)

#define UNIPHIER_LD11_SYS_CLK_STDMAC(idx)				\
	UNIPHIER_CLK_GATE("stdmac", (idx), NULL, 0x210c, 8)

#define UNIPHIER_LD11_SYS_CLK_HSC(idx)					\
	UNIPHIER_CLK_GATE("hsc", (idx), NULL, 0x210c, 9)

#define UNIPHIER_PRO4_SYS_CLK_GIO(idx)					\
	UNIPHIER_CLK_GATE("gio", (idx), NULL, 0x2104, 6)

#define UNIPHIER_PRO4_SYS_CLK_USB3(idx, ch)				\
	UNIPHIER_CLK_GATE("usb3" #ch, (idx), NULL, 0x2104, 16 + (ch))

#define UNIPHIER_PRO4_SYS_CLK_AIO(idx)					\
	UNIPHIER_CLK_FACTOR("aio-io200m", -1, "spll", 1, 8),		\
	UNIPHIER_CLK_GATE("aio", (idx), "aio-io200m", 0x2104, 13)

#define UNIPHIER_PRO5_SYS_CLK_AIO(idx)					\
	UNIPHIER_CLK_FACTOR("aio-io200m", -1, "spll", 1, 12),		\
	UNIPHIER_CLK_GATE("aio", (idx), "aio-io200m", 0x2104, 13)

#define UNIPHIER_LD11_SYS_CLK_AIO(idx)					\
	UNIPHIER_CLK_FACTOR("aio-io200m", -1, "spll", 1, 10),		\
	UNIPHIER_CLK_GATE("aio", (idx), "aio-io200m", 0x2108, 0)

#define UNIPHIER_LD11_SYS_CLK_EVEA(idx)					\
	UNIPHIER_CLK_FACTOR("evea-io100m", -1, "spll", 1, 20),		\
	UNIPHIER_CLK_GATE("evea", (idx), "evea-io100m", 0x2108, 1)

#define UNIPHIER_LD11_SYS_CLK_EXIV(idx)					\
	UNIPHIER_CLK_FACTOR("exiv-io200m", -1, "spll", 1, 10),		\
	UNIPHIER_CLK_GATE("exiv", (idx), "exiv-io200m", 0x2110, 2)

#define UNIPHIER_PRO4_SYS_CLK_ETHER(idx)				\
	UNIPHIER_CLK_GATE("ether", (idx), NULL, 0x2104, 12)

#define UNIPHIER_LD11_SYS_CLK_ETHER(idx)				\
	UNIPHIER_CLK_GATE("ether", (idx), NULL, 0x210c, 6)

const struct uniphier_clk_data uniphier_ld4_sys_clk_data[] = {
	UNIPHIER_CLK_FACTOR("spll", -1, "ref", 65, 1),		/* 1597.44 MHz */
	UNIPHIER_CLK_FACTOR("upll", -1, "ref", 6000, 512),	/* 288 MHz */
	UNIPHIER_CLK_FACTOR("a2pll", -1, "ref", 24, 1),		/* 589.824 MHz */
	UNIPHIER_CLK_FACTOR("vpll27a", -1, "ref", 5625, 512),	/* 270 MHz */

Annotation

Implementation Notes