drivers/clk/ux500/u8500_of_clk.c

Source file repositories/reference/linux-study-clean/drivers/clk/ux500/u8500_of_clk.c

File Facts

System: Linux kernel
Corpus path: drivers/clk/ux500/u8500_of_clk.c
Extension: .c
Size: 19471 bytes
Lines: 619
Domain: Driver Families
Bucket: drivers/clk
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Allocates kernel memory; connect allocation flags and lifetime to context constraints.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

linux/of.h
linux/of_address.h
linux/clk-provider.h
linux/mfd/dbx500-prcmu.h
clk.h
prcc.h
reset-prcc.h

Detected Declarations

function u8500_clk_init
function for_each_child_of_node

Annotated Snippet

switch (fw_version->project) {
		case PRCMU_FW_PROJECT_U8500_C2:
		case PRCMU_FW_PROJECT_U8500_SSG1:
		case PRCMU_FW_PROJECT_U8520:
		case PRCMU_FW_PROJECT_U8420:
		case PRCMU_FW_PROJECT_U8420_SYSCLK:
		case PRCMU_FW_PROJECT_U8500_SSG2:
			sgaclk_parent = "soc0_pll";
			break;
		default:
			break;
		}
	}

	if (sgaclk_parent)
		u8500_prcmu_hw_clks.hws[PRCMU_SGACLK] =
			clk_reg_prcmu_gate("sgclk", sgaclk_parent,
					   PRCMU_SGACLK, 0);
	else
		u8500_prcmu_hw_clks.hws[PRCMU_SGACLK] =
			clk_reg_prcmu_gate("sgclk", NULL, PRCMU_SGACLK, 0);

	u8500_prcmu_hw_clks.hws[PRCMU_UARTCLK] =
		clk_reg_prcmu_gate("uartclk", NULL, PRCMU_UARTCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_MSP02CLK] =
		clk_reg_prcmu_gate("msp02clk", NULL, PRCMU_MSP02CLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_MSP1CLK] =
		clk_reg_prcmu_gate("msp1clk", NULL, PRCMU_MSP1CLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_I2CCLK] =
		clk_reg_prcmu_gate("i2cclk", NULL, PRCMU_I2CCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_SLIMCLK] =
		clk_reg_prcmu_gate("slimclk", NULL, PRCMU_SLIMCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_PER1CLK] =
		clk_reg_prcmu_gate("per1clk", NULL, PRCMU_PER1CLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_PER2CLK] =
		clk_reg_prcmu_gate("per2clk", NULL, PRCMU_PER2CLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_PER3CLK] =
		clk_reg_prcmu_gate("per3clk", NULL, PRCMU_PER3CLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_PER5CLK] =
		clk_reg_prcmu_gate("per5clk", NULL, PRCMU_PER5CLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_PER6CLK] =
		clk_reg_prcmu_gate("per6clk", NULL, PRCMU_PER6CLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_PER7CLK] =
		clk_reg_prcmu_gate("per7clk", NULL, PRCMU_PER7CLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_LCDCLK] =
		clk_reg_prcmu_scalable("lcdclk", NULL, PRCMU_LCDCLK, 0,
				       CLK_SET_RATE_GATE);
	u8500_prcmu_hw_clks.hws[PRCMU_BMLCLK] =
		clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BMLCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_HSITXCLK] =
		clk_reg_prcmu_scalable("hsitxclk", NULL, PRCMU_HSITXCLK, 0,
				       CLK_SET_RATE_GATE);
	u8500_prcmu_hw_clks.hws[PRCMU_HSIRXCLK] =
		clk_reg_prcmu_scalable("hsirxclk", NULL, PRCMU_HSIRXCLK, 0,
				       CLK_SET_RATE_GATE);
	u8500_prcmu_hw_clks.hws[PRCMU_HDMICLK] =
		clk_reg_prcmu_scalable("hdmiclk", NULL, PRCMU_HDMICLK, 0,
				       CLK_SET_RATE_GATE);
	u8500_prcmu_hw_clks.hws[PRCMU_APEATCLK] =
		clk_reg_prcmu_gate("apeatclk", NULL, PRCMU_APEATCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_APETRACECLK] =
		clk_reg_prcmu_scalable("apetraceclk", NULL, PRCMU_APETRACECLK, 0,
				       CLK_SET_RATE_GATE);
	u8500_prcmu_hw_clks.hws[PRCMU_MCDECLK] =
		clk_reg_prcmu_gate("mcdeclk", NULL, PRCMU_MCDECLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_IPI2CCLK] =
		clk_reg_prcmu_opp_gate("ipi2cclk", NULL, PRCMU_IPI2CCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_DSIALTCLK] =
		clk_reg_prcmu_gate("dsialtclk", NULL, PRCMU_DSIALTCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_DMACLK] =
		clk_reg_prcmu_gate("dmaclk", NULL, PRCMU_DMACLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_B2R2CLK] =
		clk_reg_prcmu_gate("b2r2clk", NULL, PRCMU_B2R2CLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_TVCLK] =
		clk_reg_prcmu_scalable("tvclk", NULL, PRCMU_TVCLK, 0,
				       CLK_SET_RATE_GATE);
	u8500_prcmu_hw_clks.hws[PRCMU_SSPCLK] =
		clk_reg_prcmu_gate("sspclk", NULL, PRCMU_SSPCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_RNGCLK] =
		clk_reg_prcmu_gate("rngclk", NULL, PRCMU_RNGCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_UICCCLK] =
		clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_TIMCLK] =
		clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_SYSCLK] =
		clk_reg_prcmu_gate("ab8500_sysclk", NULL, PRCMU_SYSCLK, 0);
	u8500_prcmu_hw_clks.hws[PRCMU_SDMMCCLK] =
		clk_reg_prcmu_opp_volt_scalable("sdmmcclk", NULL,
						PRCMU_SDMMCCLK, 100000000,
						CLK_SET_RATE_GATE);

Annotation

Immediate include surface: `linux/of.h`, `linux/of_address.h`, `linux/clk-provider.h`, `linux/mfd/dbx500-prcmu.h`, `clk.h`, `prcc.h`, `reset-prcc.h`.
Detected declarations: `function u8500_clk_init`, `function for_each_child_of_node`.
Atlas domain: Driver Families / drivers/clk.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.