drivers/clk/x86/clk-cgu.h
Source file repositories/reference/linux-study-clean/drivers/clk/x86/clk-cgu.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/x86/clk-cgu.h- Extension
.h- Size
- 7313 bytes
- Lines
- 336
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/regmap.h
Detected Declarations
struct lgm_clk_muxstruct lgm_clk_dividerstruct lgm_clk_ddivstruct lgm_clk_gatestruct lgm_clk_providerstruct lgm_clk_pllstruct lgm_pll_clk_datastruct lgm_clk_ddiv_datastruct lgm_clk_branchenum lgm_clk_typeenum pll_typefunction lgm_set_clk_valfunction lgm_get_clk_val
Annotated Snippet
struct lgm_clk_mux {
struct clk_hw hw;
struct regmap *membase;
unsigned int reg;
u8 shift;
u8 width;
unsigned long flags;
};
struct lgm_clk_divider {
struct clk_hw hw;
struct regmap *membase;
unsigned int reg;
u8 shift;
u8 width;
u8 shift_gate;
u8 width_gate;
unsigned long flags;
const struct clk_div_table *table;
};
struct lgm_clk_ddiv {
struct clk_hw hw;
struct regmap *membase;
unsigned int reg;
u8 shift0;
u8 width0;
u8 shift1;
u8 width1;
u8 shift2;
u8 width2;
u8 shift_gate;
u8 width_gate;
unsigned int mult;
unsigned int div;
unsigned long flags;
};
struct lgm_clk_gate {
struct clk_hw hw;
struct regmap *membase;
unsigned int reg;
u8 shift;
unsigned long flags;
};
enum lgm_clk_type {
CLK_TYPE_FIXED,
CLK_TYPE_MUX,
CLK_TYPE_DIVIDER,
CLK_TYPE_FIXED_FACTOR,
CLK_TYPE_GATE,
CLK_TYPE_NONE,
};
/**
* struct lgm_clk_provider
* @membase: IO mem base address for CGU.
* @np: device node
* @dev: device
* @clk_data: array of hw clocks and clk number.
*/
struct lgm_clk_provider {
struct regmap *membase;
struct device_node *np;
struct device *dev;
struct clk_hw_onecell_data clk_data;
};
enum pll_type {
TYPE_ROPLL,
TYPE_LJPLL,
TYPE_NONE,
};
struct lgm_clk_pll {
struct clk_hw hw;
struct regmap *membase;
unsigned int reg;
unsigned long flags;
enum pll_type type;
};
/**
* struct lgm_pll_clk_data
* @id: platform specific id of the clock.
* @name: name of this pll clock.
* @parent_data: parent clock data.
* @num_parents: number of parents.
* @flags: optional flags for basic clock.
Annotation
- Immediate include surface: `linux/regmap.h`.
- Detected declarations: `struct lgm_clk_mux`, `struct lgm_clk_divider`, `struct lgm_clk_ddiv`, `struct lgm_clk_gate`, `struct lgm_clk_provider`, `struct lgm_clk_pll`, `struct lgm_pll_clk_data`, `struct lgm_clk_ddiv_data`, `struct lgm_clk_branch`, `enum lgm_clk_type`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.