drivers/clk/x86/clk-pmc-atom.c
Source file repositories/reference/linux-study-clean/drivers/clk/x86/clk-pmc-atom.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/x86/clk-pmc-atom.c- Extension
.c- Size
- 8666 bytes
- Lines
- 379
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk-provider.hlinux/clkdev.hlinux/err.hlinux/io.hlinux/platform_data/x86/clk-pmc-atom.hlinux/platform_data/x86/pmc_atom.hlinux/platform_device.hlinux/slab.h
Detected Declarations
struct clk_plt_fixedstruct clk_pltstruct clk_plt_datafunction plt_reg_to_parentfunction plt_parent_to_regfunction plt_reg_to_enabledfunction plt_clk_reg_updatefunction plt_clk_set_parentfunction plt_clk_get_parentfunction plt_clk_enablefunction plt_clk_disablefunction plt_clk_is_enabledfunction plt_clk_unregisterfunction plt_clk_unregister_fixed_ratefunction plt_clk_unregister_fixed_rate_loopfunction plt_clk_free_parent_names_loopfunction plt_clk_unregister_loopfunction plt_clk_unregister_parentsfunction plt_clk_probefunction plt_clk_remove
Annotated Snippet
struct clk_plt_fixed {
struct clk_hw *clk;
struct clk_lookup *lookup;
};
struct clk_plt {
struct clk_hw hw;
void __iomem *reg;
struct clk_lookup *lookup;
/* protect access to PMC registers */
spinlock_t lock;
};
#define to_clk_plt(_hw) container_of(_hw, struct clk_plt, hw)
struct clk_plt_data {
struct clk_plt_fixed **parents;
u8 nparents;
struct clk_plt *clks[PMC_CLK_NUM];
struct clk_lookup *mclk_lookup;
struct clk_lookup *ether_clk_lookup;
};
/* Return an index in parent table */
static inline int plt_reg_to_parent(int reg)
{
switch (reg & PMC_MASK_CLK_FREQ) {
default:
case PMC_CLK_FREQ_XTAL:
return 0;
case PMC_CLK_FREQ_PLL:
return 1;
}
}
/* Return clk index of parent */
static inline int plt_parent_to_reg(int index)
{
switch (index) {
default:
case 0:
return PMC_CLK_FREQ_XTAL;
case 1:
return PMC_CLK_FREQ_PLL;
}
}
/* Abstract status in simpler enabled/disabled value */
static inline int plt_reg_to_enabled(int reg)
{
switch (reg & PMC_MASK_CLK_CTL) {
case PMC_CLK_CTL_GATED_ON_D3:
case PMC_CLK_CTL_FORCE_ON:
return 1; /* enabled */
case PMC_CLK_CTL_FORCE_OFF:
case PMC_CLK_CTL_RESERVED:
default:
return 0; /* disabled */
}
}
static void plt_clk_reg_update(struct clk_plt *clk, u32 mask, u32 val)
{
u32 tmp;
unsigned long flags;
spin_lock_irqsave(&clk->lock, flags);
tmp = readl(clk->reg);
tmp = (tmp & ~mask) | (val & mask);
writel(tmp, clk->reg);
spin_unlock_irqrestore(&clk->lock, flags);
}
static int plt_clk_set_parent(struct clk_hw *hw, u8 index)
{
struct clk_plt *clk = to_clk_plt(hw);
plt_clk_reg_update(clk, PMC_MASK_CLK_FREQ, plt_parent_to_reg(index));
return 0;
}
static u8 plt_clk_get_parent(struct clk_hw *hw)
{
struct clk_plt *clk = to_clk_plt(hw);
u32 value;
value = readl(clk->reg);
Annotation
- Immediate include surface: `linux/clk-provider.h`, `linux/clkdev.h`, `linux/err.h`, `linux/io.h`, `linux/platform_data/x86/clk-pmc-atom.h`, `linux/platform_data/x86/pmc_atom.h`, `linux/platform_device.h`, `linux/slab.h`.
- Detected declarations: `struct clk_plt_fixed`, `struct clk_plt`, `struct clk_plt_data`, `function plt_reg_to_parent`, `function plt_parent_to_reg`, `function plt_reg_to_enabled`, `function plt_clk_reg_update`, `function plt_clk_set_parent`, `function plt_clk_get_parent`, `function plt_clk_enable`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.