drivers/clocksource/ingenic-sysost.c
Source file repositories/reference/linux-study-clean/drivers/clocksource/ingenic-sysost.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clocksource/ingenic-sysost.c- Extension
.c- Size
- 13464 bytes
- Lines
- 546
- Domain
- Driver Families
- Bucket
- drivers/clocksource
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/bitops.hlinux/clk.hlinux/clk-provider.hlinux/clockchips.hlinux/clocksource.hlinux/interrupt.hlinux/mfd/syscon.hlinux/of_address.hlinux/of_irq.hlinux/sched_clock.hlinux/slab.hlinux/syscore_ops.hdt-bindings/clock/ingenic,sysost.h
Detected Declarations
struct ingenic_soc_infostruct ingenic_ost_clk_infostruct ingenic_ost_clkstruct ingenic_ostfunction ingenic_ost_percpu_timer_recalc_ratefunction ingenic_ost_global_timer_recalc_ratefunction ingenic_ost_get_prescalefunction ingenic_ost_determine_ratefunction ingenic_ost_percpu_timer_set_ratefunction ingenic_ost_global_timer_set_ratefunction ingenic_ost_global_timer_read_cntlfunction ingenic_ost_clocksource_readfunction ingenic_ost_cevt_set_state_shutdownfunction ingenic_ost_cevt_set_nextfunction ingenic_ost_cevt_cbfunction ingenic_ost_register_clockfunction ingenic_ost_get_clockfunction ingenic_ost_percpu_timer_initfunction ingenic_ost_global_timer_initfunction ingenic_ost_probefunction ingenic_ost_init
Annotated Snippet
struct ingenic_soc_info {
unsigned int num_channels;
};
struct ingenic_ost_clk_info {
struct clk_init_data init_data;
u8 ostccr_reg;
};
struct ingenic_ost_clk {
struct clk_hw hw;
unsigned int idx;
struct ingenic_ost *ost;
const struct ingenic_ost_clk_info *info;
};
struct ingenic_ost {
void __iomem *base;
const struct ingenic_soc_info *soc_info;
struct clk *clk, *percpu_timer_clk, *global_timer_clk;
struct clock_event_device cevt;
struct clocksource cs;
char name[20];
struct clk_hw_onecell_data *clocks;
};
static struct ingenic_ost *ingenic_ost;
static inline struct ingenic_ost_clk *to_ost_clk(struct clk_hw *hw)
{
return container_of(hw, struct ingenic_ost_clk, hw);
}
static unsigned long ingenic_ost_percpu_timer_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct ingenic_ost_clk *ost_clk = to_ost_clk(hw);
const struct ingenic_ost_clk_info *info = ost_clk->info;
unsigned int prescale;
prescale = readl(ost_clk->ost->base + info->ostccr_reg);
prescale = FIELD_GET(OSTCCR_PRESCALE1_MASK, prescale);
return parent_rate >> (prescale * 2);
}
static unsigned long ingenic_ost_global_timer_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct ingenic_ost_clk *ost_clk = to_ost_clk(hw);
const struct ingenic_ost_clk_info *info = ost_clk->info;
unsigned int prescale;
prescale = readl(ost_clk->ost->base + info->ostccr_reg);
prescale = FIELD_GET(OSTCCR_PRESCALE2_MASK, prescale);
return parent_rate >> (prescale * 2);
}
static u8 ingenic_ost_get_prescale(unsigned long rate, unsigned long req_rate)
{
u8 prescale;
for (prescale = 0; prescale < 2; prescale++)
if ((rate >> (prescale * 2)) <= req_rate)
return prescale;
return 2; /* /16 divider */
}
static int ingenic_ost_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
unsigned long rate = req->best_parent_rate;
u8 prescale;
if (req->rate > rate) {
req->rate = rate;
return 0;
}
prescale = ingenic_ost_get_prescale(rate, req->rate);
req->rate = rate >> (prescale * 2);
return 0;
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/bitops.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/clockchips.h`, `linux/clocksource.h`, `linux/interrupt.h`, `linux/mfd/syscon.h`.
- Detected declarations: `struct ingenic_soc_info`, `struct ingenic_ost_clk_info`, `struct ingenic_ost_clk`, `struct ingenic_ost`, `function ingenic_ost_percpu_timer_recalc_rate`, `function ingenic_ost_global_timer_recalc_rate`, `function ingenic_ost_get_prescale`, `function ingenic_ost_determine_rate`, `function ingenic_ost_percpu_timer_set_rate`, `function ingenic_ost_global_timer_set_rate`.
- Atlas domain: Driver Families / drivers/clocksource.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.