drivers/clocksource/mps2-timer.c
Source file repositories/reference/linux-study-clean/drivers/clocksource/mps2-timer.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clocksource/mps2-timer.c- Extension
.c- Size
- 6193 bytes
- Lines
- 274
- Domain
- Driver Families
- Bucket
- drivers/clocksource
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/clockchips.hlinux/clocksource.hlinux/err.hlinux/interrupt.hlinux/io.hlinux/irq.hlinux/of_address.hlinux/of.hlinux/of_irq.hlinux/sched_clock.hlinux/slab.h
Detected Declarations
struct clockevent_mps2function mps2_sched_readfunction clockevent_mps2_writelfunction mps2_timer_shutdownfunction mps2_timer_set_next_eventfunction mps2_timer_set_periodicfunction mps2_timer_interruptfunction mps2_clockevent_initfunction mps2_clocksource_initfunction mps2_timer_init
Annotated Snippet
struct clockevent_mps2 {
void __iomem *reg;
u32 clock_count_per_tick;
struct clock_event_device clkevt;
};
static void __iomem *sched_clock_base;
static u64 notrace mps2_sched_read(void)
{
return ~readl_relaxed(sched_clock_base + TIMER_VALUE);
}
static inline struct clockevent_mps2 *to_mps2_clkevt(struct clock_event_device *c)
{
return container_of(c, struct clockevent_mps2, clkevt);
}
static void clockevent_mps2_writel(u32 val, struct clock_event_device *c, u32 offset)
{
writel_relaxed(val, to_mps2_clkevt(c)->reg + offset);
}
static int mps2_timer_shutdown(struct clock_event_device *ce)
{
clockevent_mps2_writel(0, ce, TIMER_RELOAD);
clockevent_mps2_writel(0, ce, TIMER_CTRL);
return 0;
}
static int mps2_timer_set_next_event(unsigned long next, struct clock_event_device *ce)
{
clockevent_mps2_writel(next, ce, TIMER_VALUE);
clockevent_mps2_writel(TIMER_CTRL_IE | TIMER_CTRL_ENABLE, ce, TIMER_CTRL);
return 0;
}
static int mps2_timer_set_periodic(struct clock_event_device *ce)
{
u32 clock_count_per_tick = to_mps2_clkevt(ce)->clock_count_per_tick;
clockevent_mps2_writel(clock_count_per_tick, ce, TIMER_RELOAD);
clockevent_mps2_writel(clock_count_per_tick, ce, TIMER_VALUE);
clockevent_mps2_writel(TIMER_CTRL_IE | TIMER_CTRL_ENABLE, ce, TIMER_CTRL);
return 0;
}
static irqreturn_t mps2_timer_interrupt(int irq, void *dev_id)
{
struct clockevent_mps2 *ce = dev_id;
u32 status = readl_relaxed(ce->reg + TIMER_INT);
if (!status) {
pr_warn("spurious interrupt\n");
return IRQ_NONE;
}
writel_relaxed(1, ce->reg + TIMER_INT);
ce->clkevt.event_handler(&ce->clkevt);
return IRQ_HANDLED;
}
static int __init mps2_clockevent_init(struct device_node *np)
{
void __iomem *base;
struct clk *clk = NULL;
struct clockevent_mps2 *ce;
u32 rate;
int irq, ret;
const char *name = "mps2-clkevt";
ret = of_property_read_u32(np, "clock-frequency", &rate);
if (ret) {
clk = of_clk_get(np, 0);
if (IS_ERR(clk)) {
ret = PTR_ERR(clk);
pr_err("failed to get clock for clockevent: %d\n", ret);
goto out;
}
ret = clk_prepare_enable(clk);
if (ret) {
pr_err("failed to enable clock for clockevent: %d\n", ret);
goto out_clk_put;
}
Annotation
- Immediate include surface: `linux/clk.h`, `linux/clockchips.h`, `linux/clocksource.h`, `linux/err.h`, `linux/interrupt.h`, `linux/io.h`, `linux/irq.h`, `linux/of_address.h`.
- Detected declarations: `struct clockevent_mps2`, `function mps2_sched_read`, `function clockevent_mps2_writel`, `function mps2_timer_shutdown`, `function mps2_timer_set_next_event`, `function mps2_timer_set_periodic`, `function mps2_timer_interrupt`, `function mps2_clockevent_init`, `function mps2_clocksource_init`, `function mps2_timer_init`.
- Atlas domain: Driver Families / drivers/clocksource.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.