drivers/clocksource/timer-econet-en751221.c
Source file repositories/reference/linux-study-clean/drivers/clocksource/timer-econet-en751221.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clocksource/timer-econet-en751221.c- Extension
.c- Size
- 5174 bytes
- Lines
- 217
- Domain
- Driver Families
- Bucket
- drivers/clocksource
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/io.hlinux/cpumask.hlinux/interrupt.hlinux/clockchips.hlinux/sched_clock.hlinux/of.hlinux/of_irq.hlinux/of_address.hlinux/cpuhotplug.hlinux/clk.h
Detected Declarations
function ctl_bit_enabledfunction ctl_bit_pendingfunction cevt_is_pendingfunction cevt_interruptfunction cevt_set_next_eventfunction cevt_init_cpufunction sched_clock_readfunction cevt_dev_initfunction cevt_initfunction for_each_possible_cpufunction timer_init
Annotated Snippet
if (!econet_timer.membase[i]) {
pr_err("%pOFn: failed to map register [%d]\n", np, i);
return -ENXIO;
}
}
/* For clocksource purposes always read clock zero, whatever the CPU */
ret = clocksource_mmio_init(reg_count(0), np->name,
econet_timer.freq_hz, 301, ECONET_BITS,
clocksource_mmio_readl_up);
if (ret) {
pr_err("%pOFn: clocksource_mmio_init failed: %d", np, ret);
return ret;
}
ret = cevt_init(np);
if (ret < 0)
return ret;
sched_clock_register(sched_clock_read, ECONET_BITS,
econet_timer.freq_hz);
pr_info("%pOFn: using %u.%03u MHz high precision timer\n", np,
econet_timer.freq_hz / 1000000,
(econet_timer.freq_hz / 1000) % 1000);
return 0;
}
TIMER_OF_DECLARE(econet_timer_hpt, "econet,en751221-timer", timer_init);
Annotation
- Immediate include surface: `linux/io.h`, `linux/cpumask.h`, `linux/interrupt.h`, `linux/clockchips.h`, `linux/sched_clock.h`, `linux/of.h`, `linux/of_irq.h`, `linux/of_address.h`.
- Detected declarations: `function ctl_bit_enabled`, `function ctl_bit_pending`, `function cevt_is_pending`, `function cevt_interrupt`, `function cevt_set_next_event`, `function cevt_init_cpu`, `function sched_clock_read`, `function cevt_dev_init`, `function cevt_init`, `function for_each_possible_cpu`.
- Atlas domain: Driver Families / drivers/clocksource.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.