drivers/clocksource/timer-imx-tpm.c
Source file repositories/reference/linux-study-clean/drivers/clocksource/timer-imx-tpm.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clocksource/timer-imx-tpm.c- Extension
.c- Size
- 5938 bytes
- Lines
- 245
- Domain
- Driver Families
- Bucket
- drivers/clocksource
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/clockchips.hlinux/clocksource.hlinux/delay.hlinux/interrupt.hlinux/sched_clock.htimer-of.h
Detected Declarations
function tpm_timer_disablefunction tpm_timer_enablefunction tpm_irq_acknowledgefunction tpm_read_counterfunction tpm_read_current_timerfunction tpm_read_sched_clockfunction tpm_set_next_eventfunction tpm_set_state_oneshotfunction tpm_set_state_shutdownfunction tpm_timer_interruptfunction tpm_clocksource_initfunction tpm_clockevent_initfunction tpm_timer_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2016 Freescale Semiconductor, Inc.
// Copyright 2017 NXP
#include <linux/clk.h>
#include <linux/clockchips.h>
#include <linux/clocksource.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/sched_clock.h>
#include "timer-of.h"
#define TPM_PARAM 0x4
#define TPM_PARAM_WIDTH_SHIFT 16
#define TPM_PARAM_WIDTH_MASK (0xff << 16)
#define TPM_SC 0x10
#define TPM_SC_CMOD_INC_PER_CNT (0x1 << 3)
#define TPM_SC_CMOD_DIV_DEFAULT 0x3
#define TPM_SC_CMOD_DIV_MAX 0x7
#define TPM_SC_TOF_MASK (0x1 << 7)
#define TPM_CNT 0x14
#define TPM_MOD 0x18
#define TPM_STATUS 0x1c
#define TPM_STATUS_CH0F BIT(0)
#define TPM_C0SC 0x20
#define TPM_C0SC_CHIE BIT(6)
#define TPM_C0SC_MODE_SHIFT 2
#define TPM_C0SC_MODE_MASK 0x3c
#define TPM_C0SC_MODE_SW_COMPARE 0x4
#define TPM_C0SC_CHF_MASK (0x1 << 7)
#define TPM_C0V 0x24
static int counter_width __ro_after_init;
static void __iomem *timer_base __ro_after_init;
static inline void tpm_timer_disable(void)
{
unsigned int val;
/* channel disable */
val = readl(timer_base + TPM_C0SC);
val &= ~(TPM_C0SC_MODE_MASK | TPM_C0SC_CHIE);
writel(val, timer_base + TPM_C0SC);
}
static inline void tpm_timer_enable(void)
{
unsigned int val;
/* channel enabled in sw compare mode */
val = readl(timer_base + TPM_C0SC);
val |= (TPM_C0SC_MODE_SW_COMPARE << TPM_C0SC_MODE_SHIFT) |
TPM_C0SC_CHIE;
writel(val, timer_base + TPM_C0SC);
}
static inline void tpm_irq_acknowledge(void)
{
writel(TPM_STATUS_CH0F, timer_base + TPM_STATUS);
}
static inline unsigned long tpm_read_counter(void)
{
return readl(timer_base + TPM_CNT);
}
#if defined(CONFIG_ARM)
static struct delay_timer tpm_delay_timer;
static unsigned long tpm_read_current_timer(void)
{
return tpm_read_counter();
}
static u64 notrace tpm_read_sched_clock(void)
{
return tpm_read_counter();
}
#endif
static int tpm_set_next_event(unsigned long delta,
struct clock_event_device *evt)
{
unsigned long next, prev, now;
prev = tpm_read_counter();
next = prev + delta;
writel(next, timer_base + TPM_C0V);
Annotation
- Immediate include surface: `linux/clk.h`, `linux/clockchips.h`, `linux/clocksource.h`, `linux/delay.h`, `linux/interrupt.h`, `linux/sched_clock.h`, `timer-of.h`.
- Detected declarations: `function tpm_timer_disable`, `function tpm_timer_enable`, `function tpm_irq_acknowledge`, `function tpm_read_counter`, `function tpm_read_current_timer`, `function tpm_read_sched_clock`, `function tpm_set_next_event`, `function tpm_set_state_oneshot`, `function tpm_set_state_shutdown`, `function tpm_timer_interrupt`.
- Atlas domain: Driver Families / drivers/clocksource.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.