drivers/clocksource/timer-ixp4xx.c
Source file repositories/reference/linux-study-clean/drivers/clocksource/timer-ixp4xx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clocksource/timer-ixp4xx.c- Extension
.c- Size
- 7701 bytes
- Lines
- 294
- Domain
- Driver Families
- Bucket
- drivers/clocksource
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/interrupt.hlinux/io.hlinux/clockchips.hlinux/clocksource.hlinux/sched_clock.hlinux/slab.hlinux/bitops.hlinux/delay.hlinux/of_address.hlinux/of_irq.hlinux/platform_device.h
Detected Declarations
struct ixp4xx_timerfunction to_ixp4xx_timerfunction ixp4xx_read_timerfunction ixp4xx_read_sched_clockfunction ixp4xx_clocksource_readfunction ixp4xx_timer_interruptfunction ixp4xx_set_next_eventfunction ixp4xx_shutdownfunction ixp4xx_set_oneshotfunction ixp4xx_set_periodicfunction ixp4xx_resumefunction ixp4xx_timer_registerfunction ixp4xx_timer_probefunction ixp4xx_of_timer_init
Annotated Snippet
struct ixp4xx_timer {
void __iomem *base;
u32 latch;
struct clock_event_device clkevt;
#ifdef CONFIG_ARM
struct delay_timer delay_timer;
#endif
};
/*
* A local singleton used by sched_clock and delay timer reads, which are
* fast and stateless
*/
static struct ixp4xx_timer *local_ixp4xx_timer;
static inline struct ixp4xx_timer *
to_ixp4xx_timer(struct clock_event_device *evt)
{
return container_of(evt, struct ixp4xx_timer, clkevt);
}
static unsigned long ixp4xx_read_timer(void)
{
return __raw_readl(local_ixp4xx_timer->base + IXP4XX_OSTS_OFFSET);
}
static u64 notrace ixp4xx_read_sched_clock(void)
{
return ixp4xx_read_timer();
}
static u64 ixp4xx_clocksource_read(struct clocksource *c)
{
return ixp4xx_read_timer();
}
static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id)
{
struct ixp4xx_timer *tmr = dev_id;
struct clock_event_device *evt = &tmr->clkevt;
/* Clear Pending Interrupt */
__raw_writel(IXP4XX_OSST_TIMER_1_PEND,
tmr->base + IXP4XX_OSST_OFFSET);
evt->event_handler(evt);
return IRQ_HANDLED;
}
static int ixp4xx_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
struct ixp4xx_timer *tmr = to_ixp4xx_timer(evt);
u32 val;
val = __raw_readl(tmr->base + IXP4XX_OSRT1_OFFSET);
/* Keep enable/oneshot bits */
val &= IXP4XX_OST_RELOAD_MASK;
__raw_writel((cycles & ~IXP4XX_OST_RELOAD_MASK) | val,
tmr->base + IXP4XX_OSRT1_OFFSET);
return 0;
}
static int ixp4xx_shutdown(struct clock_event_device *evt)
{
struct ixp4xx_timer *tmr = to_ixp4xx_timer(evt);
u32 val;
val = __raw_readl(tmr->base + IXP4XX_OSRT1_OFFSET);
val &= ~IXP4XX_OST_ENABLE;
__raw_writel(val, tmr->base + IXP4XX_OSRT1_OFFSET);
return 0;
}
static int ixp4xx_set_oneshot(struct clock_event_device *evt)
{
struct ixp4xx_timer *tmr = to_ixp4xx_timer(evt);
__raw_writel(IXP4XX_OST_ENABLE | IXP4XX_OST_ONE_SHOT,
tmr->base + IXP4XX_OSRT1_OFFSET);
return 0;
}
static int ixp4xx_set_periodic(struct clock_event_device *evt)
{
struct ixp4xx_timer *tmr = to_ixp4xx_timer(evt);
Annotation
- Immediate include surface: `linux/interrupt.h`, `linux/io.h`, `linux/clockchips.h`, `linux/clocksource.h`, `linux/sched_clock.h`, `linux/slab.h`, `linux/bitops.h`, `linux/delay.h`.
- Detected declarations: `struct ixp4xx_timer`, `function to_ixp4xx_timer`, `function ixp4xx_read_timer`, `function ixp4xx_read_sched_clock`, `function ixp4xx_clocksource_read`, `function ixp4xx_timer_interrupt`, `function ixp4xx_set_next_event`, `function ixp4xx_shutdown`, `function ixp4xx_set_oneshot`, `function ixp4xx_set_periodic`.
- Atlas domain: Driver Families / drivers/clocksource.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.