drivers/clocksource/timer-nxp-pit.c
Source file repositories/reference/linux-study-clean/drivers/clocksource/timer-nxp-pit.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clocksource/timer-nxp-pit.c- Extension
.c- Size
- 9280 bytes
- Lines
- 384
- Domain
- Driver Families
- Bucket
- drivers/clocksource
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/interrupt.hlinux/clockchips.hlinux/cpuhotplug.hlinux/clk.hlinux/of_address.hlinux/of_irq.hlinux/sched_clock.hlinux/platform_device.h
Detected Declarations
struct pit_timerstruct pit_timer_datafunction pit_module_enablefunction pit_module_disablefunction pit_timer_enablefunction pit_timer_disablefunction pit_timer_set_counterfunction pit_timer_irqackfunction pit_read_sched_clockfunction pit_timer_clocksource_readfunction pit_clocksource_initfunction pit_set_next_eventfunction pit_shutdownfunction pit_set_periodicfunction pit_timer_interruptfunction pit_clockevent_per_cpu_initfunction pit_clockevent_per_cpu_exitfunction pit_clockevent_starting_cpufunction pit_timer_initfunction pit_timer_probe
Annotated Snippet
struct pit_timer {
void __iomem *clksrc_base;
void __iomem *clkevt_base;
struct clock_event_device ced;
struct clocksource cs;
int rate;
};
struct pit_timer_data {
int max_pit_instances;
};
static DEFINE_PER_CPU(struct pit_timer *, pit_timers);
/*
* Global structure for multiple PITs initialization
*/
static int pit_instances;
static int max_pit_instances = 1;
static void __iomem *sched_clock_base;
static inline struct pit_timer *ced_to_pit(struct clock_event_device *ced)
{
return container_of(ced, struct pit_timer, ced);
}
static inline struct pit_timer *cs_to_pit(struct clocksource *cs)
{
return container_of(cs, struct pit_timer, cs);
}
static inline void pit_module_enable(void __iomem *base)
{
writel(0, PITMCR(base));
}
static inline void pit_module_disable(void __iomem *base)
{
writel(PITMCR_MDIS, PITMCR(base));
}
static inline void pit_timer_enable(void __iomem *base, bool tie)
{
u32 val = PITTCTRL_TEN | (tie ? PITTCTRL_TIE : 0);
writel(val, PITTCTRL(base));
}
static inline void pit_timer_disable(void __iomem *base)
{
writel(0, PITTCTRL(base));
}
static inline void pit_timer_set_counter(void __iomem *base, unsigned int cnt)
{
writel(cnt, PITLDVAL(base));
}
static inline void pit_timer_irqack(struct pit_timer *pit)
{
writel(PITTFLG_TIF, PITTFLG(pit->clkevt_base));
}
static u64 notrace pit_read_sched_clock(void)
{
return ~readl(sched_clock_base);
}
static u64 pit_timer_clocksource_read(struct clocksource *cs)
{
struct pit_timer *pit = cs_to_pit(cs);
return (u64)~readl(PITCVAL(pit->clksrc_base));
}
static int pit_clocksource_init(struct pit_timer *pit, const char *name,
void __iomem *base, unsigned long rate)
{
/*
* The channels 0 and 1 can be chained to build a 64-bit
* timer. Let's use the channel 2 as a clocksource and leave
* the channels 0 and 1 unused for anyone else who needs them
*/
pit->clksrc_base = base + PIT_CH(2);
pit->cs.name = name;
pit->cs.rating = 300;
pit->cs.read = pit_timer_clocksource_read;
pit->cs.mask = CLOCKSOURCE_MASK(32);
pit->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
Annotation
- Immediate include surface: `linux/interrupt.h`, `linux/clockchips.h`, `linux/cpuhotplug.h`, `linux/clk.h`, `linux/of_address.h`, `linux/of_irq.h`, `linux/sched_clock.h`, `linux/platform_device.h`.
- Detected declarations: `struct pit_timer`, `struct pit_timer_data`, `function pit_module_enable`, `function pit_module_disable`, `function pit_timer_enable`, `function pit_timer_disable`, `function pit_timer_set_counter`, `function pit_timer_irqack`, `function pit_read_sched_clock`, `function pit_timer_clocksource_read`.
- Atlas domain: Driver Families / drivers/clocksource.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.