drivers/clocksource/timer-realtek.c
Source file repositories/reference/linux-study-clean/drivers/clocksource/timer-realtek.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clocksource/timer-realtek.c- Extension
.c- Size
- 3303 bytes
- Lines
- 151
- Domain
- Driver Families
- Bucket
- drivers/clocksource
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/irqflags.hlinux/interrupt.htimer-of.h
Detected Declarations
function rtk_ts64_readfunction rtk_cmp_value_writefunction rtk_cmp_en_writefunction rtk_syst_clkevt_next_eventfunction rtk_ts_match_intr_handlerfunction rtk_syst_shutdownfunction rtk_systimer_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2025 Realtek Semiconductor Corp.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/irqflags.h>
#include <linux/interrupt.h>
#include "timer-of.h"
#define ENBL 1
#define DSBL 0
#define SYSTIMER_RATE 1000000
#define SYSTIMER_MIN_DELTA 0x64
#define SYSTIMER_MAX_DELTA ULONG_MAX
/* SYSTIMER Register Offset (RTK Internal Use) */
#define TS_LW_OFST 0x0
#define TS_HW_OFST 0x4
#define TS_CMP_VAL_LW_OFST 0x8
#define TS_CMP_VAL_HW_OFST 0xC
#define TS_CMP_CTRL_OFST 0x10
#define TS_CMP_STAT_OFST 0x14
/* SYSTIMER CMP CTRL REG Mask */
#define TS_CMP_EN_MASK 0x1
#define TS_WR_EN0_MASK 0x2
static void __iomem *systimer_base;
static u64 rtk_ts64_read(void)
{
u32 low, high;
u64 ts;
/* Caution: Read LSB word (TS_LW_OFST) first then MSB (TS_HW_OFST) */
low = readl(systimer_base + TS_LW_OFST);
high = readl(systimer_base + TS_HW_OFST);
ts = ((u64)high << 32) | low;
return ts;
}
static void rtk_cmp_value_write(u64 value)
{
u32 high, low;
low = value & 0xFFFFFFFF;
high = value >> 32;
writel(high, systimer_base + TS_CMP_VAL_HW_OFST);
writel(low, systimer_base + TS_CMP_VAL_LW_OFST);
}
static inline void rtk_cmp_en_write(bool cmp_en)
{
u32 val;
val = TS_WR_EN0_MASK;
if (cmp_en == ENBL)
val |= TS_CMP_EN_MASK;
writel(val, systimer_base + TS_CMP_CTRL_OFST);
}
static int rtk_syst_clkevt_next_event(unsigned long cycles, struct clock_event_device *clkevt)
{
u64 cmp_val;
rtk_cmp_en_write(DSBL);
cmp_val = rtk_ts64_read();
/* Set CMP value to current timestamp plus delta_us */
rtk_cmp_value_write(cmp_val + cycles);
rtk_cmp_en_write(ENBL);
return 0;
}
static irqreturn_t rtk_ts_match_intr_handler(int irq, void *dev_id)
{
struct clock_event_device *clkevt = dev_id;
void __iomem *reg_base;
u32 val;
/* Disable TS CMP Match */
rtk_cmp_en_write(DSBL);
/* Clear TS CMP INTR */
Annotation
- Immediate include surface: `linux/irqflags.h`, `linux/interrupt.h`, `timer-of.h`.
- Detected declarations: `function rtk_ts64_read`, `function rtk_cmp_value_write`, `function rtk_cmp_en_write`, `function rtk_syst_clkevt_next_event`, `function rtk_ts_match_intr_handler`, `function rtk_syst_shutdown`, `function rtk_systimer_init`.
- Atlas domain: Driver Families / drivers/clocksource.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.