drivers/cpufreq/s5pv210-cpufreq.c
Source file repositories/reference/linux-study-clean/drivers/cpufreq/s5pv210-cpufreq.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/cpufreq/s5pv210-cpufreq.c- Extension
.c- Size
- 17413 bytes
- Lines
- 686
- Domain
- Driver Families
- Bucket
- drivers/cpufreq
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/kernel.hlinux/init.hlinux/err.hlinux/clk.hlinux/io.hlinux/cpufreq.hlinux/of.hlinux/of_address.hlinux/platform_device.hlinux/reboot.hlinux/regulator/consumer.h
Detected Declarations
struct dram_confstruct s5pv210_dvs_confenum perf_levelenum s5pv210_mem_typeenum s5pv210_dmc_portfunction s5pv210_set_refreshfunction s5pv210_targetfunction check_mem_typefunction s5pv210_cpu_initfunction s5pv210_cpufreq_reboot_notifier_eventfunction s5pv210_cpufreq_probefunction for_each_compatible_node_scoped
Annotated Snippet
struct dram_conf {
unsigned long freq; /* HZ */
unsigned long refresh; /* DRAM refresh counter * 1000 */
};
/* DRAM configuration (DMC0 and DMC1) */
static struct dram_conf s5pv210_dram_conf[2];
enum perf_level {
L0, L1, L2, L3, L4,
};
enum s5pv210_mem_type {
LPDDR = 0x1,
LPDDR2 = 0x2,
DDR2 = 0x4,
};
enum s5pv210_dmc_port {
DMC0 = 0,
DMC1,
};
static struct cpufreq_frequency_table s5pv210_freq_table[] = {
{0, L0, 1000*1000},
{0, L1, 800*1000},
{0, L2, 400*1000},
{0, L3, 200*1000},
{0, L4, 100*1000},
{0, 0, CPUFREQ_TABLE_END},
};
static struct regulator *arm_regulator;
static struct regulator *int_regulator;
struct s5pv210_dvs_conf {
int arm_volt; /* uV */
int int_volt; /* uV */
};
static const int arm_volt_max = 1350000;
static const int int_volt_max = 1250000;
static struct s5pv210_dvs_conf dvs_conf[] = {
[L0] = {
.arm_volt = 1250000,
.int_volt = 1100000,
},
[L1] = {
.arm_volt = 1200000,
.int_volt = 1100000,
},
[L2] = {
.arm_volt = 1050000,
.int_volt = 1100000,
},
[L3] = {
.arm_volt = 950000,
.int_volt = 1100000,
},
[L4] = {
.arm_volt = 950000,
.int_volt = 1000000,
},
};
static u32 clkdiv_val[5][11] = {
/*
* Clock divider value for following
* { APLL, A2M, HCLK_MSYS, PCLK_MSYS,
* HCLK_DSYS, PCLK_DSYS, HCLK_PSYS, PCLK_PSYS,
* ONEDRAM, MFC, G3D }
*/
/* L0 : [1000/200/100][166/83][133/66][200/200] */
{0, 4, 4, 1, 3, 1, 4, 1, 3, 0, 0},
/* L1 : [800/200/100][166/83][133/66][200/200] */
{0, 3, 3, 1, 3, 1, 4, 1, 3, 0, 0},
/* L2 : [400/200/100][166/83][133/66][200/200] */
{1, 3, 1, 1, 3, 1, 4, 1, 3, 0, 0},
/* L3 : [200/200/100][166/83][133/66][200/200] */
{3, 3, 1, 1, 3, 1, 4, 1, 3, 0, 0},
/* L4 : [100/100/100][83/83][66/66][100/100] */
{7, 7, 0, 0, 7, 0, 9, 0, 7, 0, 0},
};
Annotation
- Immediate include surface: `linux/types.h`, `linux/kernel.h`, `linux/init.h`, `linux/err.h`, `linux/clk.h`, `linux/io.h`, `linux/cpufreq.h`, `linux/of.h`.
- Detected declarations: `struct dram_conf`, `struct s5pv210_dvs_conf`, `enum perf_level`, `enum s5pv210_mem_type`, `enum s5pv210_dmc_port`, `function s5pv210_set_refresh`, `function s5pv210_target`, `function check_mem_type`, `function s5pv210_cpu_init`, `function s5pv210_cpufreq_reboot_notifier_event`.
- Atlas domain: Driver Families / drivers/cpufreq.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.