drivers/cpuidle/cpuidle-tegra.c
Source file repositories/reference/linux-study-clean/drivers/cpuidle/cpuidle-tegra.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/cpuidle/cpuidle-tegra.c- Extension
.c- Size
- 9676 bytes
- Lines
- 404
- Domain
- Driver Families
- Bucket
- drivers/cpuidle
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/atomic.hlinux/cpuidle.hlinux/cpumask.hlinux/cpu_pm.hlinux/delay.hlinux/errno.hlinux/platform_device.hlinux/types.hlinux/clk/tegra.hlinux/firmware/trusted_foundations.hsoc/tegra/cpuidle.hsoc/tegra/flowctrl.hsoc/tegra/fuse.hsoc/tegra/irq.hsoc/tegra/pm.hsoc/tegra/pmc.hasm/cpuidle.hasm/firmware.hasm/smp_plat.hasm/suspend.h
Detected Declarations
enum tegra_statefunction tegra_cpuidle_report_cpus_statefunction for_each_cpufunction tegra_cpuidle_wait_for_secondary_cpus_parkingfunction tegra_cpuidle_unpark_secondary_cpusfunction for_each_cpufunction tegra_cpuidle_cc6_enterfunction tegra_cpuidle_c7_enterfunction tegra_cpuidle_coupled_barrierfunction tegra_cpuidle_state_enterfunction tegra_cpuidle_adjust_state_indexfunction tegra_cpuidle_enterfunction tegra114_enter_s2idlefunction tegra_cpuidle_disable_statefunction tegra_cpuidle_pcie_irqs_in_usefunction tegra_cpuidle_setup_tegra114_c7_statefunction tegra_cpuidle_probefunction stateexport tegra_cpuidle_pcie_irqs_in_use
Annotated Snippet
if (cpu > 0) {
tegra_enable_cpu_clock(cpu);
tegra_cpu_out_of_reset(cpu);
flowctrl_write_cpu_halt(cpu, 0);
}
}
}
static int tegra_cpuidle_cc6_enter(unsigned int cpu)
{
int ret;
if (cpu > 0) {
ret = cpu_suspend(cpu, tegra_pm_park_secondary_cpu);
} else {
ret = tegra_cpuidle_wait_for_secondary_cpus_parking();
if (!ret)
ret = tegra_pm_enter_lp2();
tegra_cpuidle_unpark_secondary_cpus();
}
return ret;
}
static int tegra_cpuidle_c7_enter(void)
{
int err;
err = call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2);
if (err && err != -ENOSYS)
return err;
return cpu_suspend(0, tegra30_pm_secondary_cpu_suspend);
}
static int tegra_cpuidle_coupled_barrier(struct cpuidle_device *dev)
{
if (tegra_pending_sgi()) {
/*
* CPU got local interrupt that will be lost after GIC's
* shutdown because GIC driver doesn't save/restore the
* pending SGI state across CPU cluster PM. Abort and retry
* next time.
*/
atomic_set(&tegra_abort_flag, 1);
}
cpuidle_coupled_parallel_barrier(dev, &tegra_idle_barrier);
if (atomic_read(&tegra_abort_flag)) {
cpuidle_coupled_parallel_barrier(dev, &tegra_idle_barrier);
atomic_set(&tegra_abort_flag, 0);
return -EINTR;
}
return 0;
}
static __cpuidle int tegra_cpuidle_state_enter(struct cpuidle_device *dev,
int index, unsigned int cpu)
{
int err;
/*
* CC6 state is the "CPU cluster power-off" state. In order to
* enter this state, at first the secondary CPU cores need to be
* parked into offline mode, then the last CPU should clean out
* remaining dirty cache lines into DRAM and trigger Flow Controller
* logic that turns off the cluster's power domain (which includes
* CPU cores, GIC and L2 cache).
*/
if (index == TEGRA_CC6) {
err = tegra_cpuidle_coupled_barrier(dev);
if (err)
return err;
}
local_fiq_disable();
tegra_pm_set_cpu_in_lp2();
cpu_pm_enter();
ct_cpuidle_enter();
switch (index) {
case TEGRA_C7:
err = tegra_cpuidle_c7_enter();
break;
case TEGRA_CC6:
Annotation
- Immediate include surface: `linux/atomic.h`, `linux/cpuidle.h`, `linux/cpumask.h`, `linux/cpu_pm.h`, `linux/delay.h`, `linux/errno.h`, `linux/platform_device.h`, `linux/types.h`.
- Detected declarations: `enum tegra_state`, `function tegra_cpuidle_report_cpus_state`, `function for_each_cpu`, `function tegra_cpuidle_wait_for_secondary_cpus_parking`, `function tegra_cpuidle_unpark_secondary_cpus`, `function for_each_cpu`, `function tegra_cpuidle_cc6_enter`, `function tegra_cpuidle_c7_enter`, `function tegra_cpuidle_coupled_barrier`, `function tegra_cpuidle_state_enter`.
- Atlas domain: Driver Families / drivers/cpuidle.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.