drivers/cpuidle/governors/gov.h
Source file repositories/reference/linux-study-clean/drivers/cpuidle/governors/gov.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/cpuidle/governors/gov.h- Extension
.h- Size
- 570 bytes
- Lines
- 20
- Domain
- Driver Families
- Bucket
- drivers/cpuidle
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __CPUIDLE_GOVERNOR_H
#define __CPUIDLE_GOVERNOR_H
/*
* Idle state target residency threshold used for deciding whether or not to
* check the time till the closest expected timer event.
*/
#define RESIDENCY_THRESHOLD_NS (15 * NSEC_PER_USEC)
/*
* If the closest timer is in this range, the governor idle state selection need
* not be adjusted after the scheduler tick has been stopped.
*/
#define SAFE_TIMER_RANGE_NS (2 * TICK_NSEC)
#endif /* __CPUIDLE_GOVERNOR_H */
Annotation
- Atlas domain: Driver Families / drivers/cpuidle.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.