drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
Source file repositories/reference/linux-study-clean/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h- Extension
.h- Size
- 11684 bytes
- Lines
- 409
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
crypto/aes.hcrypto/des.hcrypto/engine.hcrypto/skcipher.hlinux/atomic.hlinux/debugfs.hlinux/crypto.hlinux/hw_random.hcrypto/internal/hash.hcrypto/md5.hcrypto/rng.hcrypto/sha1.hcrypto/sha2.h
Detected Declarations
struct ce_clockstruct ce_variantstruct sginfostruct ce_taskstruct sun8i_ce_flowstruct sun8i_ce_devstruct sun8i_cipher_req_ctxstruct sun8i_cipher_tfm_ctxstruct sun8i_ce_hash_tfm_ctxstruct sun8i_ce_hash_reqctxstruct sun8i_ce_rng_tfm_ctxstruct sun8i_ce_alg_templatefunction desc_addr_valfunction desc_addr_val_le32
Annotated Snippet
struct ce_clock {
const char *name;
unsigned long freq;
unsigned long max_freq;
};
/*
* struct ce_variant - Describe CE capability for each variant hardware
* @alg_cipher: list of supported ciphers. for each CE_ID_ this will give the
* coresponding CE_ALG_XXX value
* @alg_hash: list of supported hashes. for each CE_ID_ this will give the
* corresponding CE_ALG_XXX value
* @op_mode: list of supported block modes
* @cipher_t_dlen_in_bytes: Does the request size for cipher is in
* bytes or words
* @hash_t_dlen_in_bytes: Does the request size for hash is in
* bits or words
* @prng_t_dlen_in_bytes: Does the request size for PRNG is in
* bytes or words
* @trng_t_dlen_in_bytes: Does the request size for TRNG is in
* bytes or words
* @ce_clks: list of clocks needed by this variant
* @esr: The type of error register
* @prng: The CE_ALG_XXX value for the PRNG
* @trng: The CE_ALG_XXX value for the TRNG
*/
struct ce_variant {
char alg_cipher[CE_ID_CIPHER_MAX];
char alg_hash[CE_ID_HASH_MAX];
u32 op_mode[CE_ID_OP_MAX];
bool cipher_t_dlen_in_bytes;
bool hash_t_dlen_in_bits;
bool prng_t_dlen_in_bytes;
bool trng_t_dlen_in_bytes;
bool needs_word_addresses;
struct ce_clock ce_clks[CE_MAX_CLOCKS];
int esr;
unsigned char prng;
unsigned char trng;
};
struct sginfo {
__le32 addr;
__le32 len;
} __packed;
/*
* struct ce_task - CE Task descriptor
* The structure of this descriptor could be found in the datasheet
*/
struct ce_task {
__le32 t_id;
__le32 t_common_ctl;
__le32 t_sym_ctl;
__le32 t_asym_ctl;
__le32 t_key;
__le32 t_iv;
__le32 t_ctr;
__le32 t_dlen;
struct sginfo t_src[MAX_SG];
struct sginfo t_dst[MAX_SG];
__le32 next;
__le32 reserved[3];
} __packed __aligned(8);
/*
* struct sun8i_ce_flow - Information used by each flow
* @engine: ptr to the crypto_engine for this flow
* @complete: completion for the current task on this flow
* @status: set to 1 by interrupt if task is done
* @t_phy: Physical address of task
* @tl: pointer to the current ce_task for this flow
* @stat_req: number of request done by this flow
*/
struct sun8i_ce_flow {
struct crypto_engine *engine;
struct completion complete;
int status;
dma_addr_t t_phy;
struct ce_task *tl;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
unsigned long stat_req;
#endif
};
/*
* struct sun8i_ce_dev - main container for all this driver information
* @base: base address of CE
* @ceclks: clocks used by CE
* @reset: pointer to reset controller
Annotation
- Immediate include surface: `crypto/aes.h`, `crypto/des.h`, `crypto/engine.h`, `crypto/skcipher.h`, `linux/atomic.h`, `linux/debugfs.h`, `linux/crypto.h`, `linux/hw_random.h`.
- Detected declarations: `struct ce_clock`, `struct ce_variant`, `struct sginfo`, `struct ce_task`, `struct sun8i_ce_flow`, `struct sun8i_ce_dev`, `struct sun8i_cipher_req_ctx`, `struct sun8i_cipher_tfm_ctx`, `struct sun8i_ce_hash_tfm_ctx`, `struct sun8i_ce_hash_reqctx`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.