drivers/crypto/atmel-sha.c
Source file repositories/reference/linux-study-clean/drivers/crypto/atmel-sha.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/atmel-sha.c- Extension
.c- Size
- 67753 bytes
- Lines
- 2694
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/module.hlinux/slab.hlinux/err.hlinux/clk.hlinux/io.hlinux/hw_random.hlinux/platform_device.hlinux/device.hlinux/dmaengine.hlinux/init.hlinux/errno.hlinux/interrupt.hlinux/irq.hlinux/scatterlist.hlinux/dma-mapping.hlinux/mod_devicetable.hlinux/delay.hlinux/crypto.hcrypto/scatterwalk.hcrypto/algapi.hcrypto/sha1.hcrypto/sha2.hcrypto/hash.hcrypto/internal/hash.hatmel-sha-regs.hatmel-authenc.h
Detected Declarations
struct atmel_sha_capsstruct atmel_sha_devstruct atmel_sha_reqctxstruct atmel_sha_ctxstruct atmel_sha_dmastruct atmel_sha_devstruct atmel_sha_drvstruct atmel_sha_hmac_keystruct atmel_sha_hmac_ctxstruct atmel_sha_authenc_ctxstruct atmel_sha_authenc_reqctxfunction atmel_sha_readfunction atmel_sha_writefunction atmel_sha_completefunction atmel_sha_append_sgfunction bitsfunction atmel_sha_initfunction atmel_sha_write_ctrlfunction atmel_sha_wait_for_data_readyfunction atmel_sha_xmit_cpufunction atmel_sha_xmit_pdcfunction atmel_sha_dma_callbackfunction atmel_sha_xmit_dmafunction atmel_sha_xmit_startfunction atmel_sha_update_cpufunction atmel_sha_xmit_dma_mapfunction atmel_sha_update_dma_slowfunction atmel_sha_update_dma_startfunction atmel_sha_update_dma_stopfunction atmel_sha_update_reqfunction atmel_sha_final_reqfunction atmel_sha_copy_hashfunction atmel_sha_copy_ready_hashfunction atmel_sha_finishfunction atmel_sha_finish_reqfunction atmel_sha_hw_initfunction atmel_sha_get_versionfunction atmel_sha_hw_version_initfunction atmel_sha_handle_queuefunction atmel_sha_startfunction atmel_sha_enqueuefunction atmel_sha_updatefunction atmel_sha_finalfunction atmel_sha_finupfunction atmel_sha_digestfunction atmel_sha_exportfunction atmel_sha_importfunction atmel_sha_cra_init
Annotated Snippet
struct atmel_sha_caps {
bool has_dma;
bool has_dualbuff;
bool has_sha224;
bool has_sha_384_512;
bool has_uihv;
bool has_hmac;
};
struct atmel_sha_dev;
/*
* .statesize = sizeof(struct atmel_sha_reqctx) must be <= PAGE_SIZE / 8 as
* tested by the ahash_prepare_alg() function.
*/
struct atmel_sha_reqctx {
struct atmel_sha_dev *dd;
unsigned long flags;
unsigned long op;
u8 digest[SHA512_DIGEST_SIZE] __aligned(sizeof(u32));
u64 digcnt[2];
size_t bufcnt;
size_t buflen;
dma_addr_t dma_addr;
/* walk state */
struct scatterlist *sg;
unsigned int offset; /* offset in current sg */
unsigned int total; /* total request */
size_t block_size;
size_t hash_size;
u8 buffer[SHA_BUFFER_LEN + SHA512_BLOCK_SIZE] __aligned(sizeof(u32));
};
typedef int (*atmel_sha_fn_t)(struct atmel_sha_dev *);
struct atmel_sha_ctx {
struct atmel_sha_dev *dd;
atmel_sha_fn_t start;
unsigned long flags;
};
#define ATMEL_SHA_QUEUE_LENGTH 50
struct atmel_sha_dma {
struct dma_chan *chan;
struct dma_slave_config dma_conf;
struct scatterlist *sg;
int nents;
unsigned int last_sg_length;
};
struct atmel_sha_dev {
struct list_head list;
unsigned long phys_base;
struct device *dev;
struct clk *iclk;
int irq;
void __iomem *io_base;
spinlock_t lock;
struct tasklet_struct done_task;
struct tasklet_struct queue_task;
unsigned long flags;
struct crypto_queue queue;
struct ahash_request *req;
bool is_async;
bool force_complete;
atmel_sha_fn_t resume;
atmel_sha_fn_t cpu_transfer_complete;
struct atmel_sha_dma dma_lch_in;
struct atmel_sha_caps caps;
struct scatterlist tmp;
u32 hw_version;
};
struct atmel_sha_drv {
struct list_head dev_list;
spinlock_t lock;
};
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/module.h`, `linux/slab.h`, `linux/err.h`, `linux/clk.h`, `linux/io.h`, `linux/hw_random.h`, `linux/platform_device.h`.
- Detected declarations: `struct atmel_sha_caps`, `struct atmel_sha_dev`, `struct atmel_sha_reqctx`, `struct atmel_sha_ctx`, `struct atmel_sha_dma`, `struct atmel_sha_dev`, `struct atmel_sha_drv`, `struct atmel_sha_hmac_key`, `struct atmel_sha_hmac_ctx`, `struct atmel_sha_authenc_ctx`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.