drivers/crypto/bcm/cipher.h
Source file repositories/reference/linux-study-clean/drivers/crypto/bcm/cipher.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/bcm/cipher.h- Extension
.h- Size
- 13259 bytes
- Lines
- 470
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/atomic.hlinux/mailbox/brcm-message.hlinux/mailbox_client.hcrypto/aes.hcrypto/internal/hash.hcrypto/internal/skcipher.hcrypto/aead.hcrypto/arc4.hcrypto/gcm.hcrypto/sha1.hcrypto/sha2.hcrypto/sha3.hspu.hspum.hspu2.h
Detected Declarations
struct spu_type_subtypestruct cipher_opstruct auth_opstruct iproc_alg_sstruct spu_msg_bufstruct iproc_ctx_sstruct spu_hash_export_sstruct iproc_reqctx_sstruct spu_hwstruct bcm_device_privateenum op_typeenum spu_spu_typeenum spu_spu_subtype
Annotated Snippet
struct spu_type_subtype {
enum spu_spu_type type;
enum spu_spu_subtype subtype;
};
struct cipher_op {
enum spu_cipher_alg alg;
enum spu_cipher_mode mode;
};
struct auth_op {
enum hash_alg alg;
enum hash_mode mode;
};
struct iproc_alg_s {
u32 type;
union {
struct skcipher_alg skcipher;
struct ahash_alg hash;
struct aead_alg aead;
} alg;
struct cipher_op cipher_info;
struct auth_op auth_info;
bool auth_first;
bool registered;
};
/*
* Buffers for a SPU request/reply message pair. All part of one structure to
* allow a single alloc per request.
*/
struct spu_msg_buf {
/* Request message fragments */
/*
* SPU request message header. For SPU-M, holds MH, EMH, SCTX, BDESC,
* and BD header. For SPU2, holds FMD, OMD.
*/
u8 bcm_spu_req_hdr[ALIGN(SPU2_HEADER_ALLOC_LEN, SPU_MSG_ALIGN)];
/* IV or counter. Size to include salt. Also used for XTS tweek. */
u8 iv_ctr[ALIGN(2 * AES_BLOCK_SIZE, SPU_MSG_ALIGN)];
/* Hash digest. request and response. */
u8 digest[ALIGN(MAX_DIGEST_SIZE, SPU_MSG_ALIGN)];
/* SPU request message padding */
u8 spu_req_pad[ALIGN(SPU_PAD_LEN_MAX, SPU_MSG_ALIGN)];
/* SPU-M request message STATUS field */
u8 tx_stat[ALIGN(SPU_TX_STATUS_LEN, SPU_MSG_ALIGN)];
/* Response message fragments */
/* SPU response message header */
u8 spu_resp_hdr[ALIGN(SPU2_HEADER_ALLOC_LEN, SPU_MSG_ALIGN)];
/* SPU response message STATUS field padding */
u8 rx_stat_pad[ALIGN(SPU_STAT_PAD_MAX, SPU_MSG_ALIGN)];
/* SPU response message STATUS field */
u8 rx_stat[ALIGN(SPU_RX_STATUS_LEN, SPU_MSG_ALIGN)];
union {
/* Buffers only used for skcipher */
struct {
/*
* Field used for either SUPDT when RC4 is used
* -OR- tweak value when XTS/AES is used
*/
u8 supdt_tweak[ALIGN(SPU_SUPDT_LEN, SPU_MSG_ALIGN)];
} c;
/* Buffers only used for aead */
struct {
/* SPU response pad for GCM data */
u8 gcmpad[ALIGN(AES_BLOCK_SIZE, SPU_MSG_ALIGN)];
/* SPU request msg padding for GCM AAD */
u8 req_aad_pad[ALIGN(SPU_PAD_LEN_MAX, SPU_MSG_ALIGN)];
/* SPU response data to be discarded */
u8 resp_aad[ALIGN(MAX_ASSOC_SIZE + MAX_IV_SIZE,
SPU_MSG_ALIGN)];
} a;
};
};
struct iproc_ctx_s {
Annotation
- Immediate include surface: `linux/atomic.h`, `linux/mailbox/brcm-message.h`, `linux/mailbox_client.h`, `crypto/aes.h`, `crypto/internal/hash.h`, `crypto/internal/skcipher.h`, `crypto/aead.h`, `crypto/arc4.h`.
- Detected declarations: `struct spu_type_subtype`, `struct cipher_op`, `struct auth_op`, `struct iproc_alg_s`, `struct spu_msg_buf`, `struct iproc_ctx_s`, `struct spu_hash_export_s`, `struct iproc_reqctx_s`, `struct spu_hw`, `struct bcm_device_private`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.