drivers/crypto/caam/caamhash.c
Source file repositories/reference/linux-study-clean/drivers/crypto/caam/caamhash.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/caam/caamhash.c- Extension
.c- Size
- 57608 bytes
- Lines
- 2030
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
compat.hregs.hintern.hdesc_constr.hjr.herror.hsg_sw_sec4.hkey_gen.hcaamhash_desc.hcrypto/internal/engine.hcrypto/internal/hash.hlinux/dma-mapping.hlinux/err.hlinux/kernel.hlinux/slab.hlinux/string.h
Detected Declarations
struct caam_hash_ctxstruct caam_hash_statestruct caam_export_statestruct ahash_edescstruct caam_hash_templatestruct caam_hash_algfunction is_cmac_aesfunction map_seq_out_ptr_ctxfunction buf_map_to_sec4_sgfunction ctx_map_to_sec4_sgfunction ahash_set_sh_descfunction axcbc_set_sh_descfunction acmac_set_sh_descfunction hash_digest_keyfunction ahash_setkeyfunction axcbc_setkeyfunction acmac_setkeyfunction ahash_unmapfunction ahash_unmap_ctxfunction ahash_done_cpyfunction ahash_donefunction ahash_done_ctx_srcfunction ahash_done_switchfunction ahash_done_bifunction ahash_done_ctx_dstfunction ahash_edesc_add_srcfunction ahash_do_one_reqfunction ahash_enqueue_reqfunction ahash_update_ctxfunction is_cmac_aesfunction ahash_final_ctxfunction ahash_finup_ctxfunction ahash_digestfunction ahash_final_no_ctxfunction ahash_update_no_ctxfunction is_cmac_aesfunction ahash_finup_no_ctxfunction ahash_update_firstfunction is_cmac_aesfunction ahash_finup_firstfunction ahash_initfunction ahash_updatefunction ahash_finupfunction ahash_finalfunction ahash_exportfunction ahash_importfunction caam_hash_cra_initfunction caam_hash_cra_exit
Annotated Snippet
struct caam_hash_ctx {
u32 sh_desc_update[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned;
u32 sh_desc_update_first[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned;
u32 sh_desc_fin[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned;
u32 sh_desc_digest[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned;
u8 key[CAAM_MAX_HASH_KEY_SIZE] ____cacheline_aligned;
dma_addr_t sh_desc_update_dma ____cacheline_aligned;
dma_addr_t sh_desc_update_first_dma;
dma_addr_t sh_desc_fin_dma;
dma_addr_t sh_desc_digest_dma;
enum dma_data_direction dir;
enum dma_data_direction key_dir;
struct device *jrdev;
int ctx_len;
struct alginfo adata;
};
/* ahash state */
struct caam_hash_state {
dma_addr_t buf_dma;
dma_addr_t ctx_dma;
int ctx_dma_len;
u8 buf[CAAM_MAX_HASH_BLOCK_SIZE] ____cacheline_aligned;
int buflen;
int next_buflen;
u8 caam_ctx[MAX_CTX_LEN] ____cacheline_aligned;
int (*update)(struct ahash_request *req) ____cacheline_aligned;
int (*final)(struct ahash_request *req);
int (*finup)(struct ahash_request *req);
struct ahash_edesc *edesc;
void (*ahash_op_done)(struct device *jrdev, u32 *desc, u32 err,
void *context);
};
struct caam_export_state {
u8 buf[CAAM_MAX_HASH_BLOCK_SIZE];
u8 caam_ctx[MAX_CTX_LEN];
int buflen;
int (*update)(struct ahash_request *req);
int (*final)(struct ahash_request *req);
int (*finup)(struct ahash_request *req);
};
static inline bool is_cmac_aes(u32 algtype)
{
return (algtype & (OP_ALG_ALGSEL_MASK | OP_ALG_AAI_MASK)) ==
(OP_ALG_ALGSEL_AES | OP_ALG_AAI_CMAC);
}
/* Common job descriptor seq in/out ptr routines */
/* Map state->caam_ctx, and append seq_out_ptr command that points to it */
static inline int map_seq_out_ptr_ctx(u32 *desc, struct device *jrdev,
struct caam_hash_state *state,
int ctx_len)
{
state->ctx_dma_len = ctx_len;
state->ctx_dma = dma_map_single(jrdev, state->caam_ctx,
ctx_len, DMA_FROM_DEVICE);
if (dma_mapping_error(jrdev, state->ctx_dma)) {
dev_err(jrdev, "unable to map ctx\n");
state->ctx_dma = 0;
return -ENOMEM;
}
append_seq_out_ptr(desc, state->ctx_dma, ctx_len, 0);
return 0;
}
/* Map current buffer in state (if length > 0) and put it in link table */
static inline int buf_map_to_sec4_sg(struct device *jrdev,
struct sec4_sg_entry *sec4_sg,
struct caam_hash_state *state)
{
int buflen = state->buflen;
if (!buflen)
return 0;
state->buf_dma = dma_map_single(jrdev, state->buf, buflen,
DMA_TO_DEVICE);
if (dma_mapping_error(jrdev, state->buf_dma)) {
dev_err(jrdev, "unable to map buf\n");
state->buf_dma = 0;
return -ENOMEM;
}
dma_to_sec4_sg_one(sec4_sg, state->buf_dma, buflen, 0);
return 0;
Annotation
- Immediate include surface: `compat.h`, `regs.h`, `intern.h`, `desc_constr.h`, `jr.h`, `error.h`, `sg_sw_sec4.h`, `key_gen.h`.
- Detected declarations: `struct caam_hash_ctx`, `struct caam_hash_state`, `struct caam_export_state`, `struct ahash_edesc`, `struct caam_hash_template`, `struct caam_hash_alg`, `function is_cmac_aes`, `function map_seq_out_ptr_ctx`, `function buf_map_to_sec4_sg`, `function ctx_map_to_sec4_sg`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.