drivers/crypto/caam/intern.h

Source file repositories/reference/linux-study-clean/drivers/crypto/caam/intern.h

File Facts

System
Linux kernel
Corpus path
drivers/crypto/caam/intern.h
Extension
.h
Size
6806 bytes
Lines
267
Domain
Driver Families
Bucket
drivers/crypto
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct caam_jrentry_info {
	void (*callbk)(struct device *dev, u32 *desc, u32 status, void *arg);
	void *cbkarg;	/* Argument per ring entry */
	u32 *desc_addr_virt;	/* Stored virt addr for postprocessing */
	dma_addr_t desc_addr_dma;	/* Stored bus addr for done matching */
	u32 desc_size;	/* Stored size for postprocessing, header derived */
};

struct caam_jr_state {
	dma_addr_t inpbusaddr;
	dma_addr_t outbusaddr;
};

struct caam_jr_dequeue_params {
	struct device *dev;
	int enable_itr;
};

/* Private sub-storage for a single JobR */
struct caam_drv_private_jr {
	struct list_head	list_node;	/* Job Ring device list */
	struct device		*dev;
	int ridx;
	struct caam_job_ring __iomem *rregs;	/* JobR's register space */
	struct tasklet_struct irqtask;
	struct caam_jr_dequeue_params tasklet_params;
	int irq;			/* One per queue */
	bool hwrng;

	/* Number of scatterlist crypt transforms active on the JobR */
	atomic_t tfm_count ____cacheline_aligned;

	/* Job ring info */
	struct caam_jrentry_info *entinfo;	/* Alloc'ed 1 per ring entry */
	spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */
	u32 inpring_avail;	/* Number of free entries in input ring */
	int head;			/* entinfo (s/w ring) head index */
	void *inpring;			/* Base of input ring, alloc
					 * DMA-safe */
	int out_ring_read_index;	/* Output index "tail" */
	int tail;			/* entinfo (s/w ring) tail index */
	void *outring;			/* Base of output ring, DMA-safe */
	struct crypto_engine *engine;

	struct caam_jr_state state;	/* State of the JR during PM */
};

struct caam_ctl_state {
	struct masterid deco_mid[16];
	struct masterid jr_mid[4];
	u32 mcr;
	u32 scfgr;
};

/*
 * Driver-private storage for a single CAAM block instance
 */
struct caam_drv_private {
	/* Physical-presence section */
	struct caam_ctrl __iomem *ctrl; /* controller region */
	struct caam_deco __iomem *deco; /* DECO/CCB views */
	struct caam_assurance __iomem *assure;
	struct caam_queue_if __iomem *qi; /* QI control region */
	struct caam_job_ring __iomem *jr[4];	/* JobR's register space */

	struct iommu_domain *domain;

	/*
	 * Detected geometry block. Filled in from device tree if powerpc,
	 * or from register-based version detection code
	 */
	u8 total_jobrs;		/* Total Job Rings in device */
	u8 qi_present;		/* Nonzero if QI present in device */
	u8 blob_present;	/* Nonzero if BLOB support present in device */
	u8 mc_en;		/* Nonzero if MC f/w is active */
	u8 optee_en;		/* Nonzero if OP-TEE f/w is active */
	u8 no_page0;		/* Nonzero if register page 0 is not controlled by Linux */
	bool pr_support;        /* RNG prediction resistance available */
	int secvio_irq;		/* Security violation interrupt number */
	int virt_en;		/* Virtualization enabled in CAAM */
	int era;		/* CAAM Era (internal HW revision) */

#define	RNG4_MAX_HANDLES 2
	/* RNG4 block */
	u32 rng4_sh_init;	/* This bitmap shows which of the State
				   Handles of the RNG4 block are initialized
				   by this driver */

	struct clk_bulk_data *clks;
	int num_clks;

Annotation

Implementation Notes