drivers/crypto/caam/sg_sw_qm.h
Source file repositories/reference/linux-study-clean/drivers/crypto/caam/sg_sw_qm.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/caam/sg_sw_qm.h- Extension
.h- Size
- 2221 bytes
- Lines
- 86
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
soc/fsl/qman.hregs.h
Detected Declarations
function __dma_to_qm_sgfunction dma_to_qm_sg_onefunction dma_to_qm_sg_one_lastfunction dma_to_qm_sg_one_extfunction dma_to_qm_sg_one_last_extfunction sg_to_qm_sgfunction sg_to_qm_sg_last
Annotated Snippet
#ifndef __SG_SW_QM_H
#define __SG_SW_QM_H
#include <soc/fsl/qman.h>
#include "regs.h"
static inline void __dma_to_qm_sg(struct qm_sg_entry *qm_sg_ptr, dma_addr_t dma,
u16 offset)
{
qm_sg_entry_set64(qm_sg_ptr, dma);
qm_sg_ptr->__reserved2 = 0;
qm_sg_ptr->bpid = 0;
qm_sg_ptr->offset = cpu_to_be16(offset & QM_SG_OFF_MASK);
}
static inline void dma_to_qm_sg_one(struct qm_sg_entry *qm_sg_ptr,
dma_addr_t dma, u32 len, u16 offset)
{
__dma_to_qm_sg(qm_sg_ptr, dma, offset);
qm_sg_entry_set_len(qm_sg_ptr, len);
}
static inline void dma_to_qm_sg_one_last(struct qm_sg_entry *qm_sg_ptr,
dma_addr_t dma, u32 len, u16 offset)
{
__dma_to_qm_sg(qm_sg_ptr, dma, offset);
qm_sg_entry_set_f(qm_sg_ptr, len);
}
static inline void dma_to_qm_sg_one_ext(struct qm_sg_entry *qm_sg_ptr,
dma_addr_t dma, u32 len, u16 offset)
{
__dma_to_qm_sg(qm_sg_ptr, dma, offset);
qm_sg_ptr->cfg = cpu_to_be32(QM_SG_EXT | (len & QM_SG_LEN_MASK));
}
static inline void dma_to_qm_sg_one_last_ext(struct qm_sg_entry *qm_sg_ptr,
dma_addr_t dma, u32 len,
u16 offset)
{
__dma_to_qm_sg(qm_sg_ptr, dma, offset);
qm_sg_ptr->cfg = cpu_to_be32(QM_SG_EXT | QM_SG_FIN |
(len & QM_SG_LEN_MASK));
}
/*
* convert scatterlist to h/w link table format
* but does not have final bit; instead, returns last entry
*/
static inline struct qm_sg_entry *
sg_to_qm_sg(struct scatterlist *sg, int len,
struct qm_sg_entry *qm_sg_ptr, u16 offset)
{
int ent_len;
while (len) {
ent_len = min_t(int, sg_dma_len(sg), len);
dma_to_qm_sg_one(qm_sg_ptr, sg_dma_address(sg), ent_len,
offset);
qm_sg_ptr++;
sg = sg_next(sg);
len -= ent_len;
}
return qm_sg_ptr - 1;
}
/*
* convert scatterlist to h/w link table format
* scatterlist must have been previously dma mapped
*/
static inline void sg_to_qm_sg_last(struct scatterlist *sg, int len,
struct qm_sg_entry *qm_sg_ptr, u16 offset)
{
qm_sg_ptr = sg_to_qm_sg(sg, len, qm_sg_ptr, offset);
qm_sg_entry_set_f(qm_sg_ptr, qm_sg_entry_get_len(qm_sg_ptr));
}
#endif /* __SG_SW_QM_H */
Annotation
- Immediate include surface: `soc/fsl/qman.h`, `regs.h`.
- Detected declarations: `function __dma_to_qm_sg`, `function dma_to_qm_sg_one`, `function dma_to_qm_sg_one_last`, `function dma_to_qm_sg_one_ext`, `function dma_to_qm_sg_one_last_ext`, `function sg_to_qm_sg`, `function sg_to_qm_sg_last`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.