drivers/crypto/cavium/nitrox/nitrox_lib.c
Source file repositories/reference/linux-study-clean/drivers/crypto/cavium/nitrox/nitrox_lib.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/cavium/nitrox/nitrox_lib.c- Extension
.c- Size
- 6472 bytes
- Lines
- 301
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/cpumask.hlinux/dma-mapping.hlinux/dmapool.hlinux/delay.hlinux/gfp.hlinux/kernel.hlinux/module.hlinux/pci_regs.hlinux/vmalloc.hlinux/pci.hnitrox_dev.hnitrox_common.hnitrox_req.hnitrox_csr.h
Detected Declarations
function nitrox_cmdq_initfunction nitrox_cmdq_resetfunction nitrox_cmdq_cleanupfunction nitrox_free_aqm_queuesfunction nitrox_alloc_aqm_queuesfunction nitrox_free_pktin_queuesfunction nitrox_alloc_pktin_queuesfunction create_crypto_dma_poolfunction destroy_crypto_dma_poolfunction crypto_free_contextfunction nitrox_common_sw_initfunction nitrox_common_sw_cleanup
Annotated Snippet
if (!cmdq) {
err = -ENOMEM;
goto aqmq_fail;
}
cmdq->ndev = ndev;
cmdq->qno = i;
cmdq->instr_size = sizeof(struct aqmq_command_s);
/* AQM Queue Doorbell Counter Register Address */
offset = AQMQ_DRBLX(i);
cmdq->dbell_csr_addr = NITROX_CSR_ADDR(ndev, offset);
/* AQM Queue Commands Completed Count Register Address */
offset = AQMQ_CMD_CNTX(i);
cmdq->compl_cnt_csr_addr = NITROX_CSR_ADDR(ndev, offset);
err = nitrox_cmdq_init(cmdq, AQM_Q_ALIGN_BYTES);
if (err) {
kfree_sensitive(cmdq);
goto aqmq_fail;
}
ndev->aqmq[i] = cmdq;
}
return 0;
aqmq_fail:
nitrox_free_aqm_queues(ndev);
return err;
}
static void nitrox_free_pktin_queues(struct nitrox_device *ndev)
{
int i;
for (i = 0; i < ndev->nr_queues; i++) {
struct nitrox_cmdq *cmdq = &ndev->pkt_inq[i];
nitrox_cmdq_cleanup(cmdq);
}
kfree(ndev->pkt_inq);
ndev->pkt_inq = NULL;
}
static int nitrox_alloc_pktin_queues(struct nitrox_device *ndev)
{
int i, err;
ndev->pkt_inq = kcalloc_node(ndev->nr_queues,
sizeof(struct nitrox_cmdq),
GFP_KERNEL, ndev->node);
if (!ndev->pkt_inq)
return -ENOMEM;
for (i = 0; i < ndev->nr_queues; i++) {
struct nitrox_cmdq *cmdq;
u64 offset;
cmdq = &ndev->pkt_inq[i];
cmdq->ndev = ndev;
cmdq->qno = i;
cmdq->instr_size = sizeof(struct nps_pkt_instr);
/* packet input ring doorbell address */
offset = NPS_PKT_IN_INSTR_BAOFF_DBELLX(i);
cmdq->dbell_csr_addr = NITROX_CSR_ADDR(ndev, offset);
/* packet solicit port completion count address */
offset = NPS_PKT_SLC_CNTSX(i);
cmdq->compl_cnt_csr_addr = NITROX_CSR_ADDR(ndev, offset);
err = nitrox_cmdq_init(cmdq, PKTIN_Q_ALIGN_BYTES);
if (err)
goto pktq_fail;
}
return 0;
pktq_fail:
nitrox_free_pktin_queues(ndev);
return err;
}
static int create_crypto_dma_pool(struct nitrox_device *ndev)
{
size_t size;
/* Crypto context pool, 16 byte aligned */
size = CRYPTO_CTX_SIZE + sizeof(struct ctx_hdr);
ndev->ctx_pool = dma_pool_create("nitrox-context",
DEV(ndev), size, 16, 0);
if (!ndev->ctx_pool)
Annotation
- Immediate include surface: `linux/cpumask.h`, `linux/dma-mapping.h`, `linux/dmapool.h`, `linux/delay.h`, `linux/gfp.h`, `linux/kernel.h`, `linux/module.h`, `linux/pci_regs.h`.
- Detected declarations: `function nitrox_cmdq_init`, `function nitrox_cmdq_reset`, `function nitrox_cmdq_cleanup`, `function nitrox_free_aqm_queues`, `function nitrox_alloc_aqm_queues`, `function nitrox_free_pktin_queues`, `function nitrox_alloc_pktin_queues`, `function create_crypto_dma_pool`, `function destroy_crypto_dma_pool`, `function crypto_free_context`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.