drivers/crypto/ccree/cc_driver.h
Source file repositories/reference/linux-study-clean/drivers/crypto/ccree/cc_driver.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/ccree/cc_driver.h- Extension
.h- Size
- 6310 bytes
- Lines
- 236
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/workqueue.hlinux/interrupt.hlinux/dma-mapping.hcrypto/algapi.hcrypto/internal/skcipher.hcrypto/aes.hcrypto/sha1.hcrypto/sha2.hcrypto/aead.hcrypto/authenc.hcrypto/hash.hcrypto/skcipher.hlinux/clk.hlinux/platform_device.hcc_host_regs.hcc_crypto_ctx.hcc_hw_queue_defs.hcc_sram_mgr.h
Detected Declarations
struct cc_cpp_reqstruct cc_crypto_reqstruct cc_drvdatastruct cc_crypto_algstruct cc_alg_templatestruct async_gen_req_ctxenum cc_hw_revenum cc_std_bodyfunction dump_byte_arrayfunction cc_iowritefunction cc_ioreadfunction cc_gfp_flagsfunction set_queue_last_ind
Annotated Snippet
struct cc_cpp_req {
bool is_cpp;
enum cc_cpp_alg alg;
u8 slot;
};
#define CC_MAX_IVGEN_DMA_ADDRESSES 3
struct cc_crypto_req {
void (*user_cb)(struct device *dev, void *req, int err);
void *user_arg;
struct completion seq_compl; /* request completion */
struct cc_cpp_req cpp;
};
/**
* struct cc_drvdata - driver private data context
* @cc_base: virt address of the CC registers
* @irq: bitmap indicating source of last interrupt
*/
struct cc_drvdata {
void __iomem *cc_base;
int irq;
struct completion hw_queue_avail; /* wait for HW queue availability */
struct platform_device *plat_dev;
u32 mlli_sram_addr;
struct dma_pool *mlli_buffs_pool;
struct list_head alg_list;
void *hash_handle;
void *aead_handle;
void *request_mgr_handle;
void *fips_handle;
u32 sram_free_offset; /* offset to non-allocated area in SRAM */
struct dentry *dir; /* for debugfs */
struct clk *clk;
bool coherent;
char *hw_rev_name;
enum cc_hw_rev hw_rev;
u32 axim_mon_offset;
u32 sig_offset;
u32 ver_offset;
int std_bodies;
bool sec_disabled;
u32 comp_mask;
u32 cache_params;
u32 ace_const;
};
struct cc_crypto_alg {
struct list_head entry;
int cipher_mode;
int flow_mode; /* Note: currently, refers to the cipher mode only. */
int auth_mode;
struct cc_drvdata *drvdata;
struct skcipher_alg skcipher_alg;
struct aead_alg aead_alg;
};
struct cc_alg_template {
char name[CRYPTO_MAX_ALG_NAME];
char driver_name[CRYPTO_MAX_ALG_NAME];
unsigned int blocksize;
union {
struct skcipher_alg skcipher;
struct aead_alg aead;
} template_u;
int cipher_mode;
int flow_mode; /* Note: currently, refers to the cipher mode only. */
int auth_mode;
u32 min_hw_rev;
enum cc_std_body std_body;
bool sec_func;
unsigned int data_unit;
struct cc_drvdata *drvdata;
};
struct async_gen_req_ctx {
dma_addr_t iv_dma_addr;
u8 *iv;
enum drv_crypto_direction op_type;
};
static inline struct device *drvdata_to_dev(struct cc_drvdata *drvdata)
{
return &drvdata->plat_dev->dev;
}
void __dump_byte_array(const char *name, const u8 *buf, size_t len);
static inline void dump_byte_array(const char *name, const u8 *the_array,
size_t size)
{
Annotation
- Immediate include surface: `linux/workqueue.h`, `linux/interrupt.h`, `linux/dma-mapping.h`, `crypto/algapi.h`, `crypto/internal/skcipher.h`, `crypto/aes.h`, `crypto/sha1.h`, `crypto/sha2.h`.
- Detected declarations: `struct cc_cpp_req`, `struct cc_crypto_req`, `struct cc_drvdata`, `struct cc_crypto_alg`, `struct cc_alg_template`, `struct async_gen_req_ctx`, `enum cc_hw_rev`, `enum cc_std_body`, `function dump_byte_array`, `function cc_iowrite`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.