drivers/crypto/ccree/cc_sram_mgr.c
Source file repositories/reference/linux-study-clean/drivers/crypto/ccree/cc_sram_mgr.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/ccree/cc_sram_mgr.c- Extension
.c- Size
- 2491 bytes
- Lines
- 92
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
cc_driver.hcc_sram_mgr.h
Detected Declarations
function cc_sram_mgr_initfunction cc_sram_allocfunction cc_set_sram_desc
Annotated Snippet
if ((start & 0x3) != 0) {
dev_err(dev, "Invalid SRAM offset 0x%x\n", start);
return -EINVAL;
}
}
drvdata->sram_free_offset = start;
return 0;
}
/**
* cc_sram_alloc() - Allocate buffer from SRAM pool.
*
* @drvdata: Associated device driver context
* @size: The requested numer of bytes to allocate
*
* Return:
* Address offset in SRAM or NULL_SRAM_ADDR for failure.
*/
u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
{
struct device *dev = drvdata_to_dev(drvdata);
u32 p;
if ((size & 0x3)) {
dev_err(dev, "Requested buffer size (%u) is not multiple of 4",
size);
return NULL_SRAM_ADDR;
}
if (size > (CC_CC_SRAM_SIZE - drvdata->sram_free_offset)) {
dev_err(dev, "Not enough space to allocate %u B (at offset %u)\n",
size, drvdata->sram_free_offset);
return NULL_SRAM_ADDR;
}
p = drvdata->sram_free_offset;
drvdata->sram_free_offset += size;
dev_dbg(dev, "Allocated %u B @ %u\n", size, p);
return p;
}
/**
* cc_set_sram_desc() - Create const descriptors sequence to
* set values in given array into SRAM.
* Note: each const value can't exceed word size.
*
* @src: A pointer to array of words to set as consts.
* @dst: The target SRAM buffer to set into
* @nelement: The number of words in "src" array
* @seq: A pointer to the given IN/OUT descriptor sequence
* @seq_len: A pointer to the given IN/OUT sequence length
*/
void cc_set_sram_desc(const u32 *src, u32 dst, unsigned int nelement,
struct cc_hw_desc *seq, unsigned int *seq_len)
{
u32 i;
unsigned int idx = *seq_len;
for (i = 0; i < nelement; i++, idx++) {
hw_desc_init(&seq[idx]);
set_din_const(&seq[idx], src[i], sizeof(u32));
set_dout_sram(&seq[idx], dst + (i * sizeof(u32)), sizeof(u32));
set_flow_mode(&seq[idx], BYPASS);
}
*seq_len = idx;
}
Annotation
- Immediate include surface: `cc_driver.h`, `cc_sram_mgr.h`.
- Detected declarations: `function cc_sram_mgr_init`, `function cc_sram_alloc`, `function cc_set_sram_desc`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.