drivers/crypto/chelsio/chcr_algo.h
Source file repositories/reference/linux-study-clean/drivers/crypto/chelsio/chcr_algo.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/chelsio/chcr_algo.h- Extension
.h- Size
- 13402 bytes
- Lines
- 406
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct algo_paramstruct hash_wr_paramstruct cipher_wr_paramstruct phys_sge_pairsfunction copy_hash_init_valuesfunction get_space_for_phys_dsglfunction aes_ks_subword
Annotated Snippet
struct algo_param {
unsigned int auth_mode;
unsigned int mk_size;
unsigned int result_size;
};
struct hash_wr_param {
struct algo_param alg_prm;
unsigned int opad_needed;
unsigned int more;
unsigned int last;
unsigned int kctx_len;
unsigned int sg_len;
unsigned int bfr_len;
unsigned int hash_size;
u64 scmd1;
};
struct cipher_wr_param {
struct skcipher_request *req;
char *iv;
int bytes;
unsigned short qid;
};
enum {
AES_KEYLENGTH_128BIT = 128,
AES_KEYLENGTH_192BIT = 192,
AES_KEYLENGTH_256BIT = 256
};
enum {
KEYLENGTH_3BYTES = 3,
KEYLENGTH_4BYTES = 4,
KEYLENGTH_6BYTES = 6,
KEYLENGTH_8BYTES = 8
};
enum {
NUMBER_OF_ROUNDS_10 = 10,
NUMBER_OF_ROUNDS_12 = 12,
NUMBER_OF_ROUNDS_14 = 14,
};
/*
* CCM defines values of 4, 6, 8, 10, 12, 14, and 16 octets,
* where they indicate the size of the integrity check value (ICV)
*/
enum {
ICV_4 = 4,
ICV_6 = 6,
ICV_8 = 8,
ICV_10 = 10,
ICV_12 = 12,
ICV_13 = 13,
ICV_14 = 14,
ICV_15 = 15,
ICV_16 = 16
};
struct phys_sge_pairs {
__be16 len[8];
__be64 addr[8];
};
static const u32 chcr_sha1_init[SHA1_DIGEST_SIZE / 4] = {
SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4,
};
static const u32 chcr_sha224_init[SHA256_DIGEST_SIZE / 4] = {
SHA224_H0, SHA224_H1, SHA224_H2, SHA224_H3,
SHA224_H4, SHA224_H5, SHA224_H6, SHA224_H7,
};
static const u32 chcr_sha256_init[SHA256_DIGEST_SIZE / 4] = {
SHA256_H0, SHA256_H1, SHA256_H2, SHA256_H3,
SHA256_H4, SHA256_H5, SHA256_H6, SHA256_H7,
};
static const u64 chcr_sha384_init[SHA512_DIGEST_SIZE / 8] = {
SHA384_H0, SHA384_H1, SHA384_H2, SHA384_H3,
SHA384_H4, SHA384_H5, SHA384_H6, SHA384_H7,
};
static const u64 chcr_sha512_init[SHA512_DIGEST_SIZE / 8] = {
SHA512_H0, SHA512_H1, SHA512_H2, SHA512_H3,
SHA512_H4, SHA512_H5, SHA512_H6, SHA512_H7,
};
static inline void copy_hash_init_values(char *key, int digestsize)
Annotation
- Detected declarations: `struct algo_param`, `struct hash_wr_param`, `struct cipher_wr_param`, `struct phys_sge_pairs`, `function copy_hash_init_values`, `function get_space_for_phys_dsgl`, `function aes_ks_subword`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.