drivers/crypto/gemini/sl3516-ce.h

Source file repositories/reference/linux-study-clean/drivers/crypto/gemini/sl3516-ce.h

File Facts

System
Linux kernel
Corpus path
drivers/crypto/gemini/sl3516-ce.h
Extension
.h
Size
10124 bytes
Lines
342
Domain
Driver Families
Bucket
drivers/crypto
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct descriptor {
	union {
		u32 raw;
		/*
		 * struct desc_frame_ctrl - Information for the current descriptor
		 * @buffer_size:	the size of buffer at buf_adr
		 * @desc_count:		Upon completion of a DMA operation, DMA
		 *			write the number of descriptors used
		 *			for the current frame
		 * @checksum:		unknown
		 * @authcomp:		unknown
		 * @perr:		Protocol error during processing this descriptor
		 * @derr:		Data error during processing this descriptor
		 * @own:		0 if owned by CPU, 1 for DMA
		 */
		struct desc_frame_ctrl {
			u32 buffer_size	:16;
			u32 desc_count	:6;
			u32 checksum	:6;
			u32 authcomp	:1;
			u32 perr	:1;
			u32 derr	:1;
			u32 own		:1;
		} bits;
	} frame_ctrl;

	union {
		u32 raw;
		/*
		 * struct desc_flag_status - flag for this descriptor
		 * @tqflag:	list of flag describing the type of operation
		 *		to be performed.
		 */
		struct desc_tx_flag_status {
			u32 tqflag	:10;
			u32 unused	:22;
		} tx_flag;
	} flag_status;

	u32 buf_adr;

	union {
		u32 next_descriptor;
		/*
		 * struct desc_next - describe chaining of descriptors
		 * @sof_eof:	does the descriptor is first (0x11),
		 *		the last (0x01), middle of a chan (0x00)
		 *		or the only one (0x11)
		 * @dec:	AHB bus address increase (0), decrease (1)
		 * @eofie:	End of frame interrupt enable
		 * @ndar:	Next descriptor address
		 */
		struct desc_next {
			u32 sof_eof	:2;
			u32 dec		:1;
			u32 eofie	:1;
			u32 ndar	:28;
		} bits;
	} next_desc;
};

/*
 * struct control - The value of this register is used to set the
 *			operation mode of the IPSec Module.
 * @process_id:		Used to identify the process. The number will be copied
 *			to the descriptor status of the received packet.
 * @auth_check_len:	Number of 32-bit words to be checked or appended by the
 *			authentication module
 * @auth_algorithm:
 * @auth_mode:		0:append 1:Check Authentication Result
 * @fcs_stream_copy:	0:enable 1:disable authentication stream copy
 * @mix_key_sel:	0:use rCipherKey0-3  1:use Key Mixer
 * @aesnk:		AES Key Size
 * @cipher_algorithm:	choice of CBC/ECE and AES/DES/3DES
 * @op_mode:		Operation Mode for the IPSec Module
 */
struct pkt_control_header {
	u32 process_id		:8;
	u32 auth_check_len	:3;
	u32 un1			:1;
	u32 auth_algorithm	:3;
	u32 auth_mode		:1;
	u32 fcs_stream_copy	:1;
	u32 un2			:2;
	u32 mix_key_sel		:1;
	u32 aesnk		:4;
	u32 cipher_algorithm	:3;
	u32 un3			:1;
	u32 op_mode		:4;
};

Annotation

Implementation Notes