drivers/crypto/hisilicon/qm.c
Source file repositories/reference/linux-study-clean/drivers/crypto/hisilicon/qm.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/hisilicon/qm.c- Extension
.c- Size
- 154873 bytes
- Lines
- 6366
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/page.hlinux/acpi.hlinux/bitmap.hlinux/dma-mapping.hlinux/idr.hlinux/io.hlinux/irqreturn.hlinux/log2.hlinux/pm_runtime.hlinux/seq_file.hlinux/slab.hlinux/uacce.hlinux/uaccess.huapi/misc/uacce/hisi_qm.hlinux/hisi_acc_qm.hqm_common.h
Detected Declarations
struct qm_mailboxstruct qm_doorbellstruct hisi_qm_resourcestruct qm_hw_errstruct hisi_qm_hw_opsstruct hisi_qm_hw_errorstruct qm_typical_qos_tableenum vft_typeenum qm_alg_typeenum qm_ifc_cmdenum qm_basic_typeenum qm_cap_table_typefunction hisi_qm_q_num_setfunction qm_get_hw_error_statusfunction qm_get_dev_err_statusfunction qm_check_dev_errorfunction qm_wait_reset_finishfunction qm_fun_db_ctrlfunction qm_dev_db_ctrlfunction qm_reset_prepare_readyfunction qm_reset_bit_clearfunction qm_mb_pre_initfunction qm_mb_readfunction qm_mb_writefunction hisi_qm_wait_mb_readyfunction qm_wait_mb_finishfunction qm_mb_nolockfunction hisi_qm_mbfunction hisi_qm_mb_readfunction qm_set_and_get_xqcfunction qm_db_v1function qm_db_v2function qm_dbfunction qm_disable_clock_gatefunction qm_dev_mem_resetfunction hisi_qm_get_hw_infofunction hisi_qm_get_cap_valuefunction qm_get_xqc_depthfunction hisi_qm_set_algsfunction qm_get_irq_numfunction qm_pm_get_syncfunction qm_pm_put_syncfunction qm_cq_head_updatefunction qm_poll_req_cbfunction qm_work_processfunction qm_get_complete_eqe_numfunction qm_eq_irqfunction qm_mb_cmd_irq
Annotated Snippet
const struct bus_type *bus_type = qm->pdev->dev.bus;
char tbuf_bdf[QM_DBG_READ_LEN] = {0};
char val_buf[QM_DBG_READ_LEN] = {0};
struct pci_dev *pdev;
struct device *dev;
int ret;
ret = sscanf(buf, "%s %s", tbuf_bdf, val_buf);
if (ret != QM_QOS_PARAM_NUM)
return -EINVAL;
ret = kstrtoul(val_buf, 10, val);
if (ret || *val == 0 || *val > QM_QOS_MAX_VAL) {
pci_err(qm->pdev, "input qos value is error, please set 1~1000!\n");
return -EINVAL;
}
dev = bus_find_device_by_name(bus_type, NULL, tbuf_bdf);
if (!dev) {
pci_err(qm->pdev, "input pci bdf number is error!\n");
return -ENODEV;
}
pdev = container_of(dev, struct pci_dev, dev);
if (pci_physfn(pdev) != qm->pdev) {
pci_err(qm->pdev, "the pdev input does not match the pf!\n");
put_device(dev);
return -EINVAL;
}
*fun_index = pdev->devfn;
put_device(dev);
return 0;
}
static ssize_t qm_algqos_write(struct file *filp, const char __user *buf,
size_t count, loff_t *pos)
{
struct hisi_qm *qm = filp->private_data;
char tbuf[QM_DBG_READ_LEN];
unsigned int fun_index;
unsigned long val;
int len, ret;
if (*pos != 0)
return 0;
if (count >= QM_DBG_READ_LEN)
return -ENOSPC;
len = simple_write_to_buffer(tbuf, QM_DBG_READ_LEN - 1, pos, buf, count);
if (len < 0)
return len;
tbuf[len] = '\0';
ret = qm_get_qos_value(qm, tbuf, &val, &fun_index);
if (ret)
return ret;
/* Mailbox and reset cannot be operated at the same time */
if (test_and_set_bit(QM_RESETTING, &qm->misc_ctl)) {
pci_err(qm->pdev, "dev resetting, write alg qos failed!\n");
return -EAGAIN;
}
ret = qm_pm_get_sync(qm);
if (ret) {
ret = -EINVAL;
goto err_get_status;
}
ret = qm_func_shaper_enable(qm, fun_index, val);
if (ret) {
pci_err(qm->pdev, "failed to enable function shaper!\n");
ret = -EINVAL;
goto err_put_sync;
}
pci_info(qm->pdev, "the qos value of function%u is set to %lu.\n",
fun_index, val);
ret = count;
err_put_sync:
qm_pm_put_sync(qm);
err_get_status:
clear_bit(QM_RESETTING, &qm->misc_ctl);
return ret;
}
Annotation
- Immediate include surface: `asm/page.h`, `linux/acpi.h`, `linux/bitmap.h`, `linux/dma-mapping.h`, `linux/idr.h`, `linux/io.h`, `linux/irqreturn.h`, `linux/log2.h`.
- Detected declarations: `struct qm_mailbox`, `struct qm_doorbell`, `struct hisi_qm_resource`, `struct qm_hw_err`, `struct hisi_qm_hw_ops`, `struct hisi_qm_hw_error`, `struct qm_typical_qos_table`, `enum vft_type`, `enum qm_alg_type`, `enum qm_ifc_cmd`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: pattern implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.