drivers/crypto/hisilicon/sec2/sec_main.c
Source file repositories/reference/linux-study-clean/drivers/crypto/hisilicon/sec2/sec_main.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/hisilicon/sec2/sec_main.c- Extension
.c- Size
- 42929 bytes
- Lines
- 1576
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/acpi.hlinux/bitops.hlinux/debugfs.hlinux/init.hlinux/io.hlinux/iommu.hlinux/kernel.hlinux/module.hlinux/pci.hlinux/pm_runtime.hlinux/seq_file.hlinux/topology.hlinux/uacce.hsec.h
Detected Declarations
struct sec_hw_errorstruct sec_dfx_itemfunction sec_diff_regs_showfunction sec_pf_q_num_setfunction sec_ctx_q_num_setfunction sec_destroy_qpsfunction sec_get_alg_bitmapfunction sec_set_endianfunction sec_wait_sva_readyfunction sec_close_sva_prefetchfunction sec_open_sva_prefetchfunction sec_engine_sva_configfunction sec_enable_clock_gatefunction sec_disable_clock_gatefunction sec_engine_initfunction sec_set_user_domain_and_cachefunction sec_debug_regs_clearfunction sec_master_ooo_ctrlfunction sec_hw_error_enablefunction sec_hw_error_disablefunction sec_clear_enable_readfunction sec_clear_enable_writefunction sec_debug_readfunction sec_debug_writefunction sec_debugfs_atomic64_getfunction sec_debugfs_atomic64_setfunction sec_regs_showfunction sec_cap_regs_showfunction sec_core_debug_initfunction sec_debug_initfunction sec_debugfs_initfunction sec_debugfs_exitfunction sec_show_last_regs_initfunction sec_show_last_regs_uninitfunction sec_show_last_dfx_regsfunction sec_log_hw_errorfunction sec_get_hw_err_statusfunction sec_clear_hw_err_statusfunction sec_disable_error_reportfunction sec_enable_error_reportfunction sec_open_axi_master_ooofunction sec_get_err_resultfunction sec_dev_is_abnormalfunction sec_disable_axi_errorfunction sec_enable_axi_errorfunction sec_err_info_initfunction sec_pf_probe_initfunction sec_pre_store_cap_reg
Annotated Snippet
static const struct file_operations sec_dbg_fops = {
.owner = THIS_MODULE,
.open = simple_open,
.read = sec_debug_read,
.write = sec_debug_write,
};
static int sec_debugfs_atomic64_get(void *data, u64 *val)
{
*val = atomic64_read((atomic64_t *)data);
return 0;
}
static int sec_debugfs_atomic64_set(void *data, u64 val)
{
if (val)
return -EINVAL;
atomic64_set((atomic64_t *)data, 0);
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(sec_atomic64_ops, sec_debugfs_atomic64_get,
sec_debugfs_atomic64_set, "%llu\n");
static int sec_regs_show(struct seq_file *s, void *unused)
{
hisi_qm_regs_dump(s, s->private);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(sec_regs);
static int sec_cap_regs_show(struct seq_file *s, void *unused)
{
struct hisi_qm *qm = s->private;
u32 i, size;
size = qm->cap_tables.qm_cap_size;
for (i = 0; i < size; i++)
seq_printf(s, "%s= 0x%08x\n", qm->cap_tables.qm_cap_table[i].name,
qm->cap_tables.qm_cap_table[i].cap_val);
size = qm->cap_tables.dev_cap_size;
for (i = 0; i < size; i++)
seq_printf(s, "%s= 0x%08x\n", qm->cap_tables.dev_cap_table[i].name,
qm->cap_tables.dev_cap_table[i].cap_val);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(sec_cap_regs);
static int sec_core_debug_init(struct hisi_qm *qm)
{
struct dfx_diff_registers *sec_regs = qm->debug.acc_diff_regs;
struct sec_dev *sec = container_of(qm, struct sec_dev, qm);
struct device *dev = &qm->pdev->dev;
struct sec_dfx *dfx = &sec->debug.dfx;
struct debugfs_regset32 *regset;
struct dentry *tmp_d;
int i;
tmp_d = debugfs_create_dir("sec_dfx", qm->debug.debug_root);
regset = devm_kzalloc(dev, sizeof(*regset), GFP_KERNEL);
if (!regset)
return -ENOMEM;
regset->regs = sec_dfx_regs;
regset->nregs = ARRAY_SIZE(sec_dfx_regs);
regset->base = qm->io_base;
regset->dev = dev;
if (qm->pdev->device == PCI_DEVICE_ID_HUAWEI_SEC_PF)
debugfs_create_file("regs", 0444, tmp_d, regset, &sec_regs_fops);
if (qm->fun_type == QM_HW_PF && sec_regs)
debugfs_create_file("diff_regs", 0444, tmp_d,
qm, &sec_diff_regs_fops);
for (i = 0; i < ARRAY_SIZE(sec_dfx_labels); i++) {
atomic64_t *data = (atomic64_t *)((uintptr_t)dfx +
sec_dfx_labels[i].offset);
debugfs_create_file(sec_dfx_labels[i].name, 0644,
tmp_d, data, &sec_atomic64_ops);
}
Annotation
- Immediate include surface: `linux/acpi.h`, `linux/bitops.h`, `linux/debugfs.h`, `linux/init.h`, `linux/io.h`, `linux/iommu.h`, `linux/kernel.h`, `linux/module.h`.
- Detected declarations: `struct sec_hw_error`, `struct sec_dfx_item`, `function sec_diff_regs_show`, `function sec_pf_q_num_set`, `function sec_ctx_q_num_set`, `function sec_destroy_qps`, `function sec_get_alg_bitmap`, `function sec_set_endian`, `function sec_wait_sva_ready`, `function sec_close_sva_prefetch`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.