drivers/crypto/hisilicon/zip/dae_main.c
Source file repositories/reference/linux-study-clean/drivers/crypto/hisilicon/zip/dae_main.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/hisilicon/zip/dae_main.c- Extension
.c- Size
- 6866 bytes
- Lines
- 278
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/io.hlinux/uacce.hzip.h
Detected Declarations
struct hisi_dae_hw_errorfunction dae_is_supportfunction hisi_dae_set_user_domainfunction hisi_dae_set_algfunction hisi_dae_master_ooo_ctrlfunction hisi_dae_hw_error_enablefunction hisi_dae_hw_error_disablefunction hisi_dae_get_hw_err_statusfunction hisi_dae_clear_hw_err_statusfunction hisi_dae_disable_error_reportfunction hisi_dae_enable_error_reportfunction hisi_dae_log_hw_errorfunction hisi_dae_get_err_resultfunction hisi_dae_dev_is_abnormalfunction hisi_dae_close_axi_master_ooofunction hisi_dae_open_axi_master_ooo
Annotated Snippet
struct hisi_dae_hw_error {
u32 int_msk;
const char *msg;
};
static const struct hisi_dae_hw_error dae_hw_error[] = {
{ .int_msk = BIT(0), .msg = "dae_axi_bus_err" },
{ .int_msk = BIT(1), .msg = "dae_axi_poison_err" },
{ .int_msk = BIT(2), .msg = "dae_ecc_2bit_err" },
{ .int_msk = BIT(3), .msg = "dae_ecc_1bit_err" },
{ .int_msk = BIT(4), .msg = "dae_fsm_hbeat_err" },
};
static inline bool dae_is_support(struct hisi_qm *qm)
{
if (test_bit(QM_SUPPORT_DAE, &qm->caps))
return true;
return false;
}
int hisi_dae_set_user_domain(struct hisi_qm *qm)
{
u32 val;
int ret;
if (!dae_is_support(qm))
return 0;
val = readl(qm->io_base + DAE_MEM_START_OFFSET);
val |= DAE_MEM_START_MASK;
writel(val, qm->io_base + DAE_MEM_START_OFFSET);
ret = readl_relaxed_poll_timeout(qm->io_base + DAE_MEM_DONE_OFFSET, val,
val & DAE_MEM_DONE_MASK,
DAE_REG_RD_INTVRL_US, DAE_REG_RD_TMOUT_US);
if (ret)
pci_err(qm->pdev, "failed to init dae memory!\n");
return ret;
}
int hisi_dae_set_alg(struct hisi_qm *qm)
{
const char *alg_name;
size_t len;
if (!dae_is_support(qm))
return 0;
if (!qm->uacce)
return 0;
if (qm->ver >= QM_HW_V5)
alg_name = DAE_V5_ALG_NAME;
else
alg_name = DAE_ALG_NAME;
len = strlen(qm->uacce->algs);
/* A line break may be required */
if (len + strlen(alg_name) + 1 >= QM_DEV_ALG_MAX_LEN) {
pci_err(qm->pdev, "algorithm name is too long!\n");
return -EINVAL;
}
if (len)
strcat((char *)qm->uacce->algs, "\n");
strcat((char *)qm->uacce->algs, alg_name);
return 0;
}
static void hisi_dae_master_ooo_ctrl(struct hisi_qm *qm, bool enable)
{
u32 axi_val, err_val;
axi_val = readl(qm->io_base + DAE_AXI_CFG_OFFSET);
if (enable) {
axi_val |= DAE_AXI_SHUTDOWN_MASK;
err_val = DAE_ERR_SHUTDOWN_MASK;
} else {
axi_val &= ~DAE_AXI_SHUTDOWN_MASK;
err_val = 0;
}
writel(axi_val, qm->io_base + DAE_AXI_CFG_OFFSET);
writel(err_val, qm->io_base + DAE_ERR_SHUTDOWN_OFFSET);
}
void hisi_dae_hw_error_enable(struct hisi_qm *qm)
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/io.h`, `linux/uacce.h`, `zip.h`.
- Detected declarations: `struct hisi_dae_hw_error`, `function dae_is_support`, `function hisi_dae_set_user_domain`, `function hisi_dae_set_alg`, `function hisi_dae_master_ooo_ctrl`, `function hisi_dae_hw_error_enable`, `function hisi_dae_hw_error_disable`, `function hisi_dae_get_hw_err_status`, `function hisi_dae_clear_hw_err_status`, `function hisi_dae_disable_error_report`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.